STM32W108CB STMicroelectronics, STM32W108CB Datasheet - Page 102

no-image

STM32W108CB

Manufacturer Part Number
STM32W108CB
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108CB

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32W108CBT6
Manufacturer:
ST
0
Part Number:
STM32W108CBU6
Manufacturer:
ST
Quantity:
20 000
Part Number:
STM32W108CBU61
Manufacturer:
ST
0
Part Number:
STM32W108CBU61TR
Manufacturer:
ST
0
Part Number:
STM32W108CBU63
Manufacturer:
ST
0
Part Number:
STM32W108CBU63TR
Manufacturer:
ST
0
Part Number:
STM32W108CBU63TR
Manufacturer:
ST
Quantity:
20 000
Part Number:
STM32W108CBU64
Manufacturer:
ST
Quantity:
2 330
Part Number:
STM32W108CBU64TR
Manufacturer:
IDT
Quantity:
5 803
Part Number:
STM32W108CBU64TR
Manufacturer:
ST
Quantity:
20 000
Serial interfaces
9.12
9.12.1
Table 64.
102/232
31
15
30
14
Universal asynchronous receiver / transmitter (UART)
registers
Refer to the SPI Master mode section for a description of the SCx_DATA register.
UART status register (SC1_UARTSTAT)
Address offset: 0xC848
Reset value:
UART status register (SC1_UARTSTAT)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
29
13
SC_UARTTXIDLE: This bit is set when both the transmit FIFO and the transmit serializer are
empty.
SC_UARTPARERR: This bit is set when the byte in the data register was received with a parity
error. This bit is updated when the data register is read, and is cleared if the receive FIFO is
empty.
SC_UARTFRMERR: This bit is set when the byte in the data register was received with a frame
error. This bit is updated when the data register is read, and is cleared if the receive FIFO is
empty.
SC_UARTRXOVF: This bit is set when the receive FIFO has been overrun. This occurs if a byte
is received when the receive FIFO is full. This bit is cleared by reading the data register.
SC_UARTTXFREE: This bit is set when the transmit FIFO has space for at least one byte.
SC_UARTRXVAL: This bit is set when the receive FIFO contains at least one byte.
SC_UARTCTS: This bit is set when both the transmit FIFO and the transmit serializer are
empty.
28
12
Reserved
27
11
0x0000 0040
26
10
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
25
9
Doc ID 16252 Rev 13
24
8
Reserved
23
7
SC_UA
RTTXI
DLE
22
6
r
SC_UA
RTPAR
ERR
21
5
r
RMER
SC_U
ARTF
20
R
4
r
SC_UA
RTRX
OVF
19
3
r
SC_UA
RTTXF
REE
18
2
r
SC_UA
RTRXV
17
AL
1
r
SC_UA
RTCTS
16
0
r

Related parts for STM32W108CB