STM32W108CB STMicroelectronics, STM32W108CB Datasheet - Page 138

• Manufacturer Part Number: STM32W108CB
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108CB

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

General-purpose timers
10.1.11
138/232
A special case: OCy fast enable
In one-pulse mode, the edge detection on the TIy input sets the TIM_CEN bit, which
enables the counter. Then the comparison between the counter and the compare value
toggles the output. However, several clock cycles are needed for this operation, and it limits
the minimum delay (tDELAY min) achievable.
To output a waveform with the minimum delay, set the TIM_OCyFE bit in the TIMx_CCMR1
register. Then OCyREF (and OCy) is forced in response to the stimulus, without taking the
comparison into account. Its new level is the same as if a compare match had occurred.
TIM_OCyFE acts only if the channel is configured in PWM mode 1 or 2.
Encoder interface mode
To select encoder interface mode, write TIM_SMS = 001 in the TIMx_SMCR register to
count only TI2 edges, TIM_SMS = 010 to count only TI1 edges, and TIM_SMS = 011 to
count both TI1 and TI2 edges.
Select the TI1 and TI2 polarity by programming the TIM_CC1P and TIM_CC2P bits in the
TIMx_CCER register. If needed, program the input filter as well.
The two inputs TI1 and TI2 are used to interface to an incremental encoder (see
Assuming that it is enabled, (the TIM_CEN bit in the TIMx_CR1 register written to 1) the
counter is clocked by each valid transition on TI1FP1 or TI2FP2 (TI1 and TI2 after input filter
and polarity selection, TI1FP1 = TI1 if not filtered and not inverted, TI2FP2 = TI2 if not
filtered and not inverted.) The sequence of transitions of the two inputs is evaluated, and
generates count pulses as well as the direction signal. Depending on the sequence, the
counter counts up or down, and hardware modifies the TIM_DIR bit in the TIMx_CR1
register accordingly. The TIM_DIR bit is calculated at each transition on any input (TI1 or
TI2), whether the counter is counting on TI1 only, TI2 only, or both TI1 and TI2.
Encoder interface mode acts simply as an external clock with direction selection. This
means that the counter just counts continuously between 0 and the auto-reload value in the
TIMx_ARR register (0 to TIMx_ARR or TIMx_ARR down to 0 depending on the direction),
so TIMx_ARR must be configured before starting. In the same way, the capture, compare,
prescaler, and trigger output features continue to work as normal.
In this mode the counter is modified automatically following the speed and the direction of
the incremental encoder, and therefore its contents always represent the encoder's position.
The count direction corresponds to the rotation direction of the connected sensor.
summarizes the possible combinations, assuming TI1 and TI2 do not switch at the same
time.
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Doc ID 16252 Rev 13
Table
Table 86
86).