ST7232AK1 STMicroelectronics, ST7232AK1 Datasheet - Page 33

• Manufacturer Part Number: ST7232AK1
• Description: 8-BIT MCU WITH 8K FLASH/ROM, ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST7232AK1

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

INTERRUPTS (Cont’d)
Table 8. Interrupt Mapping
Note 1: Unexpected exit from HALT may occur when SPI is in slave mode.
7.6 EXTERNAL INTERRUPTS
7.6.1 I/O Port Interrupt Sensitivity
The external interrupt sensitivity is controlled by
the IPA, IPB and ISxx bits of the EICR register
(Figure
independent external interrupt source sensitivities.
Each external interrupt source can be generated
on four (or five) different events on the pin:
■
■
■
N°
10
11
0
1
2
3
4
5
6
7
8
9
Falling edge
Rising edge
Falling and rising edge
MCC/RTC
19). This control allows to have up to 4 fully
TIMER A
TIMER B
Source
RESET
Block
TRAP
SPI
SCI
ei0
ei1
ei2
ei3
Reset
Software interrupt
Main clock controller time base inter-
rupt
External interrupt port A3..0
External interrupt port F2..0
External interrupt port B3..0
External interrupt port B7..4
SPI peripheral interrupts
TIMER A peripheral interrupts
TIMER B peripheral interrupts
SCI Peripheral interrupts
Not used
Not used
Description
Not used
■
■
To guarantee correct functionality, the sensitivity
bits in the EICR register can be modified only
when the I1 and I0 bits of the CC register are both
set to 1 (level 3). This means that interrupts must
be disabled before changing sensitivity.
The pending interrupts are cleared by writing a dif-
ferent value in the ISx[1:0], IPA or IPB bits of the
EICR.
Register
MCCSR
SPICSR
SCISR
TASR
TBSR
Label
Falling edge and low level
Rising edge and high level (only for ei0 and ei2)
N/A
N/A
Priority
Priority
Priority
Higher
Order
Lower
HALT
yes
from
Exit
yes
yes
yes
yes
yes
yes
no
no
no
no
1)
ACTIVE
HALT
from
Exit
yes
yes
no
no
no
no
no
no
no
no
no
FFECh-FFEDh
FFFCh-FFFDh
FFEAh-FFEBh
FFFAh-FFFBh
FFEEh-FFEFh
FFFEh-FFFFh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
Address
ST7232A
Vector
33/157
1