ST72215G2 STMicroelectronics, ST72215G2 Datasheet - Page 33

• Manufacturer Part Number: ST72215G2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, I2C INTERFACES
• Manufacturer: STMicroelectronics

Specifications of ST72215G2

• Emulation Voltage: 5.5 V

I/O PORTS (Cont’d)
CAUTION: The alternate function must not be ac-
tivated as long as the pin is configured as input
with interrupt, in order to avoid generating spurious
interrupts.
Analog alternate function
When the pin is used as an ADC input, the I/O
must be configured as floating input. The analog
multiplexer (controlled by the ADC registers)
switches the analog voltage present on the select-
ed pin to the common analog rail which is connect-
ed to the ADC input.
It is recommended not to change the voltage level
or loading on any port pin while conversion is in
progress. Furthermore it is recommended not to
have clocking pins located close to a selected an-
alog pin.
WARNING: The analog input voltage level must
be within the limits stated in the absolute maxi-
mum ratings.
9.3 I/O PORT IMPLEMENTATION
The hardware implementation on each I/O port de-
pends on the settings in the DDR and OR registers
and specific feature of the I/O port such as ADC In-
put or true open drain.
Switching these I/O ports from one state to anoth-
er should be done in a sequence that prevents un-
wanted side effects. Recommended safe transi-
tions are illustrated in
are potentially risky and should be avoided, since
they are likely to present unwanted side-effects
such as spurious interrupt generation.
Table 8. Port Configuration
Port C
Port A
Port B
Port
PA7
PA6
PA5
PA4
PA3:0
PB7:0
PC7:0
Pin name
Figure 2.
OR = 0
floating
floating
floating
floating
floating
floating
floating
Input (DDR = 0)
Other transitions
floating interrupt
floating interrupt
pull-up interrupt
pull-up interrupt
pull-up interrupt
pull-up interrupt
pull-up interrupt
OR = 1
ST72104Gx, ST72215Gx, ST72216Gx, ST72254Gx
Figure 22. Interrupt I/O Port State Transitions
The I/O port register configurations are summa-
rized as follows.
Interrupt Ports
PA7, PA5, PA3:0, PB7:0, PC5:0 (with pull-up)
True Open Drain Interrupt Ports
PA6, PA4 (without pull-up)
floating input
pull-up interrupt input
open drain output
push-pull output
floating input
floating interrupt input
open drain (high sink ports)
floating/pull-up
interrupt
INPUT
open drain
open drain
open drain
open drain
open drain
01
OR = 0
true open-drain
true open-drain
MODE
MODE
(reset state)
floating
INPUT
Output (DDR = 1)
00
push-pull
push-pull
push-pull
push-pull
push-pull
OR = 1
open-drain
OUTPUT
10
XX = DDR, OR
DDR
DDR
0
0
1
1
0
0
1
High-Sink
Yes
OUTPUT
push-pull
No
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OR
OR
X
0
1
0
1
0
1