ST72321AR6 STMicroelectronics, ST72321AR6 Datasheet - Page 159

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ST72321AR6

Manufacturer Part Number
ST72321AR6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH,10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321AR6

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt,Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
12.9 CONTROL PIN CHARACTERISTICS
12.9.1 Asynchronous RESET Pin
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels.
3. The I
(I/O ports and control pins) must not exceed I
4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on
the RESET pin with a duration below t
5. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy en-
vironments.
6. Data guaranteed by design, not tested in production.
t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
R
V
V
V
V
I
hys
IO
OL
ON
IH
IL
IO
current sunk must always respect the absolute maximum rating specified in
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
Input current on RESET pin
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Parameter
1)
5)
1)
3)
h(RSTL)in
4)
VSS
2)
can be ignored.
.
DD
V
Stretch applied on
external pulse
Internal reset sources
, f
DD
CPU
=5V
Conditions
, and T
I
IO
=+2mA
A
ST72321Rx ST72321ARx ST72321Jx
unless otherwise specified.
0.85xV
Min
2.5
20
20
0
DD
Section 12.2.2
Typ
2.5
0.2
200
30
30
2
0.16xV
and the sum of I
Max
120
42
42
0.5
6)
6)
DD
159/193
Unit
mA
μs
μs
μs
ns
V
V
IO

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