MAXQ613 Maxim, MAXQ613 Datasheet - Page 11

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MAXQ613

Manufacturer Part Number
MAXQ613
Description
The MAXQ613 is a low-power, 16-bit MAXQ® microcontroller designed for low-power applications including universal remote controls, consumer electronics, and white goods
Manufacturer
Maxim
Datasheet

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The MAXQ613 provides integrated, low-cost solutions
that simplify the design of IR communications equipment
such as universal remote controls. Standard features
include the highly optimized, single-cycle, MAXQ, 16-bit
RISC core; 48KB of program flash memory; 1.5KB data
RAM; soft stack; 16 general-purpose registers; and
three data pointers. The MAXQ core has the industry’s
best MIPS/mA rating, allowing developers to achieve
the same performance as competing microcontrollers
at substantially lower clock rates. Lower active-mode
current combined with the even lower MAXQ613 stop-
mode current (0.2FA typ) results in increased battery life.
Application-specific peripherals include flexible timers
for generating IR carrier frequencies and modulation. A
high-current IR drive pin capable of sinking up to 25mA
current and output pins capable of sinking up to 5mA
are ideal for IR applications. It also includes general-
purpose I/O pins ideal for keypad matrix input, and a
power-fail-detection circuit to notify the application when
the supply voltage is nearing the microcontroller’s mini-
mum operating voltage.
At the heart of the device is the MAXQ 16-bit, RISC core.
Operating from DC to 12MHz, almost all instructions exe-
cute in a single clock cycle (83.3ns at 12MHz), enabling
nearly 12MIPS true-code operation. When active device
operation is not required, an ultra-low-power stop mode
16-BIT TIMER
REGULATOR
MONITOR
VOLTAGE
GPIO
16-Bit Microcontroller with Infrared Module
2x
______________________________________________________________________________________
WATCHDOG
8kHz NANO
CLOCK
RING
Detailed Description
16-BIT MAXQ
MAXQ613
RISC CPU
UTILITY ROM
48KB FLASH
DATA SRAM
MEMORY
1.5KB
5.5KB
Block Diagram
IR DRIVER
IR TIMER
USART
SPI
can be invoked from software, resulting in quiescent
current consumption of less than 0.2FA (typ) and 2.0FA
(max). The combination of high-performance instructions
and ultra-low stop-mode current increases battery life
over competing microcontrollers. An integrated POR cir-
cuit with brownout support resets the device to a known
condition following a power-up cycle or brownout condi-
tion. Additionally, a power-fail warning flag is set, and a
power-fail interrupt can be generated when the system
voltage falls below the power-fail warning voltage, V
The power-fail warning feature allows the application to
notify the user that the system supply is low and appro-
priate action should be taken.
The device is based on Maxim’s low-power, 16-bit MAXQ
family of RISC cores. The core supports the Harvard
memory architecture with separate 16-bit program and
data address buses. A fixed 16-bit instruction word is
standard, but data can be arranged in 8 or 16 bits. The
MAXQ core in the device is implemented as a pipe-
lined processor with performance approaching 1MIPS
per MHz. The 16-bit data path is implemented around
register modules, and each register module contributes
specific functions to the core. The accumulator module
consists of sixteen 16-bit registers and is tightly coupled
with the arithmetic logic unit (ALU). A configurable soft
stack supports program flow.
Execution of instructions is triggered by data transfer
between functional register modules or between a func-
tional register module and memory. Because data move-
ment involves only source and destination modules,
circuit switching activities are limited to active modules
only. For power-conscious applications, this approach
localizes power dissipation and minimizes switching
noise. The modular architecture also provides a maxi-
mum of flexibility and reusability that are important for a
microprocessor used in embedded applications.
The MAXQ instruction set is highly orthogonal. All arith-
metical and logical operations can use any register
in conjunction with the accumulator. Data movement
is supported from any register to any other register.
Memory is accessed through specific data-pointer reg-
isters with autoincrement/decrement support.
Microprocessor
PFW
11
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