MAX9242 Maxim, MAX9242 Datasheet - Page 16

• Manufacturer Part Number: MAX9242
• Description: The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs
• Manufacturer: Maxim

DC-coupled link (2.4V - 1.425V = 0.975V and 1.075V -
0V = 1.075V). Common-mode voltage differences may
be due to ground potential variation or common-mode
noise. If there is more than ±1V of difference, the receiver
is not guaranteed to read the input signal correctly and
may cause bit errors. AC-coupling filters low-frequency
ground shifts and common-mode noise and passes
high-frequency data. A common-mode voltage differ-
ence up to the voltage rating of the coupling capacitor
(minus half the differential swing) is tolerated. DC-bal-
anced coding of the data is required to maintain the
differential signal amplitude and limit jitter on an
AC-coupled link. A capacitor in series with each output
of the LVDS driver is sufficient for AC-coupling. However,
two capacitors—one at the serializer output and one at
the deserializer input—provide protection in case either
end of the cable is shorted to a high voltage.
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
Figure 16. Output Waveforms when PLL1 Loses Lock and Locks Again
Figure 17. Output Waveforms if Spread-Spectrum PLL Loses Lock and Locks Again
16
SSPLL LOCK
RxCLKOUT
INTERNAL
SSPLL LOCK
PLL1 LOCK
RxOUT_
______________________________________________________________________________________
RxCLKOUT
INTERNAL
INTERNAL
RxOUT_
TIMING SHOWN FOR STABLE CLOCK AND DATA INPUTS
LOW
LOW
RPLLS2 (32,800 x RCIP)
RPLLS (65,600 x RCIP)
LOW
Voltage droop and the DSV of transmitted symbols
cause signal transitions to start from different voltage
levels. Because the transition time is finite, starting the
signal transition from different voltage levels causes
timing jitter. The time constant for an AC-coupled link
needs to be chosen to reduce droop and jitter to an
acceptable level.
The RC network for an AC-coupled link consists of the
LVDS receiver termination resistor (R
output resistor (R
itors (C). The RC time constant for two equal-value
series capacitors is (C x (R
RC time constant for four equal-value series capacitors
is (C x (R
LOW
LOW
Selection of AC-Coupling Capacitors
T
+ R
O
Applications Information
)) / 4 (Figure 20).
O
), and the series AC-coupling capac-
T
+ R
O
)) / 2 (Figure 19). The
T
), the LVDS driver