BTS 5562E Infineon Technologies, BTS 5562E Datasheet - Page 12

• Manufacturer Part Number: BTS 5562E
• Manufacturer: Infineon Technologies

Specifications of BTS 5562E

• Packages: PG-DSO-36
• Channels: 5.0
• Channel Mix: 3x50mohm+2*130mohm
• Led Mode: No
• Cranking Mode: No
• Pwm Engine Integrated: No

SPOC - BTS5562E
Power Supply
5.2
Reset
There are several reset triggers implemented in the device. They reset the SPI registers and errors flags to their
default values. The power stages are not affected by the reset signals.
The first SPI transmission after any kind of reset contains at pin SO the read information from register OUT,
the transmission error bit TER is set.
Power-On Reset
V
V
The power-on reset is released, when
voltage level is higher than
. The SPI interface can be accessed
DD
DD(min)
t
after wake up time
.
WU(PO)
Reset Command
There is a reset command available to reset all register bits of the register bank and the diagnosis registers. As
soon as HWCR.RST = 1, a reset is triggered equivalent to power-on reset. The SPI interface can be accessed after
t
transfer delay time
.
CS(td)
Limp Home Mode
In Limp Home mode, the SPI write-registers are reset. Output OUTx will follow the input INx configuration only.
For application example see
Figure
21. The SPI interface is operating normally, so the limp home register bit LHI
as well as the error flags can be read, but any write command will be ignored. To activate the Limp Home mode,
V
LHI input pin voltage must be higher than
.
LHI(H)
Data Sheet
12
Rev. 1.0, 2008-05-15