CS61304A Cirrus Logic, Inc., CS61304A Datasheet - Page 4

• Manufacturer Part Number: CS61304A
• Description: T1-E1 Line Interface Unit for CPE-ISDN PRI
• Manufacturer: Cirrus Logic, Inc.

ANALOG SPECIFICATIONS
Notes: 19. For input amplitude of 1.2 V
4
Receiver
RTIP/RRING Input Impedance
Sensitivity Below DSX (0dB = 2.4V)
Data Decision Threshold
Allowable Consecutive Zeros before LOS
Receiver Input Jitter Tolerance
Loss of Signal Threshold
Jitter Attenuator
Jitter Attenuation Curve Corner Frequency
Attenuation at 10kHz Jitter Frequency
Attenuator Input Jitter Tolerance
(Before Onset of FIFO Overflow or Underflow Protection)
20. For input amplitude of 0.5 V
21. For input amplitude of 1.05 V
22. Jitter tolerance increases at lower frequencies. See Figure 11.
23. The analog input squelch circuit shall operate when the input signal amplitude above ground on the
24. Attenuation measured with input jitter equal to 3/4 of measured jitter tolerance. Circuit attenuates
RTIP and RRING pins falls within the range of 0.25V to 0.50V. Operation of the squelch results in
the recovery of zeros. During receive LOS, the RPOS, RNEG or RDATA outputs are forced low.
jitter at 20 dB/decade above the corner frequency. See Figure 12. Output jitter can increase
significantly when more than 138 UI’s are input to the attenuator. See discussion in the text section.
T1, DSX-1
T1, DSX-1
T1, FCC Part 68 and E1
10kHz - 100kHz
2kHz
10Hz and below
Parameter
pk
pk
pk
(TA = -40 C to 85 C; TV+, RV+ = 5.0V 5%; GND = 0V)
to 4.14 V
to 1.2 V
to 3.3 V
(Notes 16, 24)
(Notes 16, 24)
(Notes 16, 24)
pk
pk
pk
(Note 19)
(Note 20)
(Note 21)
(Note 22)
(Note 23)
and from 4.14 V
.
.
-13.6
0.25
Min
500
160
300
138
0.4
6.0
60
53
45
-
-
-
pk
to RV+.
0.30
Typ
175
50k
50
65
65
50
3
-
-
-
-
-
-
CS61304A
Max
0.50
190
70
77
55
-
-
-
-
-
-
-
-
-
DS156PP2
% of peak
% of peak
% of peak
Units
bits
mV
dB
Hz
dB
UI
UI
UI
UI
V