LPC1769 NXP Semiconductors, LPC1769 Datasheet - Page 50

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LPC1769

Manufacturer Part Number
LPC1769
Description
32-bit Arm Cortex-m3 Microcontroller; Up To 512 Kb Flash And 64 Kb Sram With Ethernet, Usb 2.0 Host/device/otg, Can
Manufacturer
NXP Semiconductors
Datasheet

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Table 13.
T
[1]
LPC1769_68_67_66_65_64_4
Product data sheet
Symbol
SSP interface
t
su(SPI_MISO)
amb
Fig 15. MISO line set-up time in SSP Master mode
The peripheral clock for SSP is PCLK = CCLK = 20 MHz.
= 25
°
C; V
Dynamic characteristic: SSP interface
Parameter
SPI_MISO set-up time
DD(3V3)
11.7 SSP interface
MOSI
MISO
shifting edges
SCK
over specified ranges.
Conditions
measured in SPI Master mode;
see
Figure 15
Rev. 04 — 1 February 2010
t
su(SPI_MISO)
LPC1769/68/67/66/65/64
32-bit ARM Cortex-M3 microcontroller
[1]
Min
30
sampling edges
Typ
002aad326
© NXP B.V. 2010. All rights reserved.
Max
-
50 of 66
Unit
ns

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