HT37Q70 Holtek Semiconductor Inc., HT37Q70 Datasheet - Page 26

• Manufacturer Part Number: HT37Q70
• Description: 4-channel Music Synthesizer Mcu
• Manufacturer: Holtek Semiconductor Inc.

Timer/Event Counter Registers - TMR0H, TMR0L,
TMR1L, TMR2L, TMR0C, TMR1C, TMR2C
HT37Q70/60/50/40/30/20 contains two 8-bit and a
16-bit Timer/Event Counters which has an associated
register known as TMR0H and TMR0L. are the location
where the timer s 16-bit value is located.TMR1L and
TMR2L are the location where the timer s 8-bit value is
located. An associated control register, known as
TMR0C, TMR1C and TMR2C contains the setup infor-
mation for the timer.
Input/Output Ports and Control Registers - PA, PB,
PC, PD, PAC, PBC, PCC, PDC
Within the area of Special Function Registers, the I/O
registers and their associated control registers play a
prominent role. All I/O ports have a designated register
correspondingly labeled as PA, PB, PC and PD. These
labeled I/O registers are mapped to specific addresses
within the Data Memory as shown in the Data Memory
table, which are used to transfer the appropriate output
or input data on that port. with each I/O port there is an
associated control register labeled PAC, PBC, PCC and
PDC, also mapped to specific addresses with the Data
Memory. The control register specifies which pins of that
port are set as inputs and which are set as outputs. To
setup a pin as an input, the corresponding bit of the con-
trol register must be set high, for an output it must be set
low. During program initialization, it is important to first
setup the control registers to specify which pins are out-
puts and which are inputs before reading data from or
writing data to the I/O ports. One flexible feature of these
registers is the ability to directly program single bits us-
ing the SET [m].i and CLR [m].i instructions. The
ability to change I/O pins from output to input and vice
versa by manipulating specific bits of the I/O control reg-
isters during normal program operation is a useful fea-
ture of these devices.
D/A Converter Registers - DAH, DAL, DACC
HT37Q70/60/50/40/30/20 provide one 16-bit D/A con-
verters. The correct operation of the D/A requires the
use of two data registers, and a control register. It con-
tain a 16-bit D/A converter, there are two data registers,
a high byte data register known as DAH, and a low byte
data register known as DAL. These are the register lo-
cations where the digital value is placed before the com-
pletion of a digital to analog conversion cycle. The
configuration of the D/A converter is setup via the con-
trol register DACC.
Rev. 1.00
26
Wavetable Function Registers -
CHANNEL_NUMBER, FREQ_NUMBER_H,
FREQ_NUMBER_L, REPEAT_NUMBER_H,
REPEAT_NUMBER_L, VOLUME_CONTROL,
HT37Q70/60/50/40/30/20 contains Wavetable synthe-
sizer Function. The HT37Q70/60/50/40/30/20 has a
built-in 8 output channels. CHANNEL_NUMBER is
channel number selection. FREQ_NUMBER_H and
FREQ_NUMBER_L are used to define the output speed
of the PCM file.
START_ADDRESS_H and START_ADDRESS_L is
setup for the start address of the PCM code before
Wavetable function implement. The repeat number reg-
ister as known REPEAT_NUMBER_H and RE-
PEAT_NUMBER_L are used to define the address
which is the repeat point of the sample. When the repeat
number is defined, it will be output from the start code to
the end code once and always output the range be-
tween the repeat address to the end code (80H) until the
volume become close. It provides the left and right vol-
ume control independently. The 10-bit left and right vol-
ume are controlled by VOLUME_CONTROL, L_VOL,
and R_VOL respectively. The VOLUME_CONTROL
contain both left and right volume some bit of high byte.
ADPCM Function Registers - ADR, XSPL, XSPH,
ADPC, ADPS
HT37Q70/60/50/40/30/20 contains ADPCM Decoder
Function. The must set initial value of register known as
XSPL and XSPH before implementing ADPCM Decoder
procedure. There are two 4-bit ADPCM encode data of
ADR. The data of ADR implement via ADPCM Decoder,
and output 8-bit PCM data which is synthesized by MIDI
synthesizer.
The ADPC is the control register for the ADPCM De-
coder. The ADPS is the status register for the ADPCM
Decoder.
CR/F Converter Registers - ASCR, TMRAH, TMRAL,
RCOCCR, TMRBH, TMRBL, RCOCR
There are 8 analog switch lines in the microcontroller for
K0~K7 for HT37Q70/60/50/40/30, except HT37Q20
which only have 4 analog switch lines for K0~K3 and a
corresponding Analog Switch control registers known
as ASCR. The RC oscillation converter contains two
16-bit programmable count-up counters and the Timer A
clock source may come from the system clock
(f
data registers, a high byte data register known as
TMRAH, and a low byte data register known as TMRAL.
The timer B clock source may come from the external
RC oscillator. There are two data registers, a high byte
data register known as TMRBH, and a low byte data
register known as TMRBL. There are two control and
status registers known as RCOCCR and RCOCR.
L_VOL, R_VOL
SYS
=f
OSC
/2) or system clock/4 (f
HT37Q70/60/50/40/30/20
OSC
February 17, 2009
/8). There are two