HMP41GF7MMP8C Hynix Semiconductor, HMP41GF7MMP8C Datasheet - Page 17

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HMP41GF7MMP8C

Manufacturer Part Number
HMP41GF7MMP8C
Description
240pin Fully Buffered Ddr2 Sdram Dimms
Manufacturer
Hynix Semiconductor
Datasheet
Rev 0.1 / May 2008
Timing Parameters
Note:
1. Defined in FB-DIMM Architecture and Protocol Spec.
Environmental Parameters
Note:
1. The designer must meet the case temperature specifications for individual module components.
2. Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and
device functional operation at or above the conditions indicated is not implied. Exposure to absolute maximum rating
conditions for extended periods
EI Assertion Pass-Thru Timing
EI Deassertion Pass-Thru Timing
EI Assertion Duration
Bit Lock Interval
Frame Lock Interval
Symbol
H
T
H
T
P
P
OPR
OPR
STG
BAR
BAR
STG
Parameter
Operating temperature
Operating humidity(relative)
Storage temperature
Storage humidity(without condensation)
Barometric pressure(operating)
Barometric pressure (storage)
Parameter
tEI Propagad
tFrameLock
Symbol
tBitLock
tEID
tEI
1
240pin Fully Buffered DDR2 SDRAM DIMMs
Min
100
-50 to +100
See Note
Typ
10 to 90
Rating
5 to 95
15240
-
3050
bitlock
Max
119
154
4
Units
o
%
%
m
m
C
frames
frames
Unit
clks
clks
clks
Note
Notes
1
1
1
-
-
1
2
2
2
2
2
17

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