MJL16218 ON Semiconductor, MJL16218 Datasheet - Page 6

• Manufacturer Part Number: MJL16218
• Description: Npn Transistor Bipolar Power Deflection Transistor For High And Very High Resolution Monitors
• Manufacturer: ON Semiconductor

MJL16218
specifically designed to meet the unique requirements of hor-
izontal deflection circuits in computer monitor applications.
Historically, deflection transistor design was focused on mini-
mizing collector current fall time. While fall time is a valid
figure of merit, a more important indicator of circuit perfor-
mance as scan rates are increased is a new characteristic,
“dynamic desaturation.” In order to assure a linear collector
current ramp, the output transistor must remain in hard satu-
ration during storage time and exhibit a rapid turn–off transi-
tion. A sluggish transition results in serious consequences.
As the saturation voltage of the output transistor increases,
6
The SCANSWITCH series of bipolar power transistors are
SYNC
R510
Figure 11. Deflection Simulator Circuit Base
R2
+ 24 V
T1: Ferroxcube Pot Core #1811 P3C8
100 F
Q1
BS170
C1
2.7 k
R7
250
Primary/Sec. Turns Ratio = 18:6
Gapped for L P = 30 H
R3
+
(DC)
R6
1 k
Drive Waveform
TIME (2 s/DIV)
9.1 k
0.005
R8
8
C4
V I
OSC
%
Table 2. High Resolution Deflection Application Simulator
MC7812
7
I B2 = 4.5 A
GND
U2
G
N
D
2
V CC
OUT
I B1 = 2.2 A
V O
6
470
R9
0.1
C5
1
MC1391P
U1
10 F
R11
470
1 W
C2
DYNAMIC DESATURATION
+
R10
47
15031
MJE
R12
1 W
470
Q3
LB = 1.5 H
CY = 0.01 F
LY = 13 H
MJ11016
+
Q2
10 F
C3
MUR110
100 V
(IB)
the voltage across the yoke drops. Roll off in the collector
current ramp results in improper beam deflection and distor-
tion of the image at the right edge of the screen. Design
changes have been made in the structure of the SCAN-
SWITCH series of devices which minimize the dynamic
desaturation interval. Dynamic desaturation has been
defined in terms of the time required for the V CE to rise from
1.0 to 5.0 volts (Figures 9 and 10) and typical performance at
optimized drive conditions has been specified. Optimization
of device structure results in a linear collector current ramp,
excellent turn–off switching performance, and significantly
lower overall power dissipation.
D1
5
4
3
2
1
0
0
T1
R1
1 k
6.2 V
Motorola Bipolar Power Transistor Device Data
DYNAMIC DESATURATION TIME
IS MEASURED FROM V CE = 1 V
TO V CE = 5 V
Figure 12. Definition of Dynamic
LB
2
Desaturation Measurement
MUR460
D2
R4
100 F
22
C6
4
1 k
TIME (ns)
R5
+
(IC)
CY
6
DUT
MJ11016
Q4
LY
Q5
V CE
8
t ds
10