S1F78100Y2A Epson Electronics America, Inc., S1F78100Y2A Datasheet - Page 56

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S1F78100Y2A

Manufacturer Part Number
S1F78100Y2A
Description
High Precision Voltage Regulators
Manufacturer
Epson Electronics America, Inc.
Datasheet
Serial Connection
Connecting two or more chips in series obtains a higher
output voltage than can be obtained using a parallel
<Precautions when connecting loads>
In case of series connections, when connecting loads
between the first stage V
second stage V
shown in Fig. 2-13, be cautions about the following
point.
* When normal output is not occurring at the V
Positive Voltage Conversion
Adding diodes converts a negative voltage to a positive
one.
To convert the voltage tripler shown earlier to a voltage
doubler, remove C2 and D2, and short circuit D3. Small
Schottky diodes are recommended for all these diodes.
The resulting voltage is lowered by V
in the forward direction for each diode used. For ex-
ample, if V
sulting voltages would be as follows.
• For a voltage tripler,
• For a voltage doubler,
S1F70000 Series
Technical Manual
minal such as at times of starting up or when turning
the V
second stage V
V
V
O
O
V
= 5 – (2
= 10 – (3
DD
REG
= 0V
DD
V
off by P
I
= –5V
= 0V, V
DD
0.6) = 3.8V
5V
REG
or up) and the second stage V
0.6) = 8.2V
OFF
terminal through the load from
I
10 F
+
signals, if current flows into the
= –5V, and V
+
DD
10 F
(or other potential of the
1
2
3
4
5
6
7
F
14
13
12
11
10
, the voltage drop
F
9
8
= 0.6V, the re-
V
O
1M
= –10V= V
REG
REG
ter-
I
EPSON
as
10 F
10 F
10 F
connection, however, this also raises the output imped-
ance.
V
V
DD
I
+
+
the first stage V
stage V
absolute maximum rating for the second stage V
the V
hampered. Consequently, When making a series
connection, insert a diode D1 between the second
stage V
voltage exceeding the second stage V
not be applied to the V
= –5 V
= 0 V
5 V
1
2
3
4
5
6
7
V
REG
O
D1
D2
D3
= 8.2 V
I
DD
and V
14
13
12
11
10
terminal, normal operation of the IC may be
9
8
or up) to cause a voltage exceeding the
10 F
+
REG
C3
V
DD
V
O
10 F
10 F
DD
= –20V
+
+
C1
C2
(or other potential of the second
as shown in Fig. 2-13 so that a
' = V
D1
REG
I
= –5V
1
2
3
4
5
6
7
terminal.
100k
1M
S1F76610 Series
to
V
10 F
REG
DD
' = –15V
14
13
12
11
10
9
8
or up may
Load
1 M
R
2–13
DD
OSC
at

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