PI6C48533-01 Pericom Semiconductor Corporation, PI6C48533-01 Datasheet - Page 2

• Manufacturer Part Number: PI6C48533-01
• Description: 3.3v Low Skew 1-to-4 Differential/lvcmos To Lvpecl Fanout Buffer
• Manufacturer: Pericom Semiconductor Corporation

Pin Description
Note:
1.
Pin Characteristics
Control Input Function Table
Note:
1.
CLK_EN
Q
Q
Q
n
Q
PCLK
Name
CLK_
R_pulldown
n
CLK_EN
PCLK
CLK
V
SEL
V
3
2
1
CLK
I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below.
NC
0
R_pullup
,
,
,
Symbol
,
CC
EE
n
n
n
n
Q
Q
Q
C
Q
0
0
1
1
IN
3
2
1
10, 13,
11, 12
14, 15
16, 17
19, 20
Pin #
8, 9
18
1
2
3
4
5
6
7
Input Pulldown Resistance
CLK_SEL
Input Pullup Resistance
Type
I_PU
I_PD
I_PD
I_PU
I_PD
I_PU
Input Capacitance
0
1
0
1
O
O
O
O
P
P
Parameter
Inputs
Connect to Negative power supply
Synchronizing clock enable. When high, clock outputs follow clock input. When low, Q
outputs are forced low,
Clock select input. When high, selects PCLK input. When low, selects CLK input. LVCMOS/
LVTTL level with 50KΩ pull-down.
Non-inverting differential clock input
Inverting differential clock input
Non-inverting differential clock input
Inverting differential clock input
Not connected
Connect to 3.3V.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
(1)
Selected Source
PCLK,
PCLK,
CLK,
CLK,
n
n
n
n
CLK
PCLK
CLK
PCLK
Conditions
n
Q
x
outputs are forced high. LVCMOS/LVTTL level with 50KΩ pull-up.
2
Differential/LVCMOS to LVPECL Fanout Buffer
Diasbled: Low
Disabled: Low
Description
Min.
Enabled
Enabled
Q
0
:Q
3
Typ.
Outputs
50
50
3.3V Low Skew 1-to-4
Diasbled: High
Disabled: High
Max.
4
n
Enabled
Enabled
Q
PI6C48533-01
0
PS8737B
:
n
Q
3
x
Units
KΩ
pF
02/08/06