AD9851 Analog Devices, AD9851 Datasheet - Page 22

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AD9851

Manufacturer Part Number
AD9851
Description
CMOS 180 MHz DDS/DAC Synthesizer
Manufacturer
Analog Devices
Datasheet

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AD9851
Figure 40. Supply current variation with analog output
frequency at 180 MHz system clock (upper trace) and
125 MHz system clock (lower trace).
Figure 41. Supply current variation with system clock
frequency.
120
110
100
120
100
90
80
70
60
50
30
40
80
60
40
20
0
0
0
20
10
ANALOG OUTPUT FREQUENCY – MHz
40
20
60
SYSTEM CLOCK – MHz
V
V
S
S
= +3.3V
= +5V
30
80
V
V
S
S
= +5V
= +3.3V
100
40
120
50
140
60
160
180
70
–22–
Figure 42. Effect of DAC maximum output current on
wideband (0 to 72 MHz) SFDR at three representative DAC
output frequencies: 1.1 MHz, 40.1 MHz and 70.1 MHz. V
+5 V, 180 MHz system clock (6 REFCLK Multiplier dis-
abled). Currents are set using appropriate values of R
Figure 43. Minimum p-p input signal needed to toggle the
AD9851 comparator output. Comparator input is a sine
wave compared with a fixed voltage threshold. Use this
data in addition to sin(x)/x roll-off and any filter losses to
determine if adequate signal is being presented to the
AD9851 comparator.
600
500
400
300
200
100
70
65
60
55
50
45
40
0
0
20
5
1.1MHz
40.1MHz
70.1MHz
40
INPUT FREQUENCY – MHz
MAXIMUM DAC I
V
S
60
10
= +3.3V
80
V
S
OUT
= +5V
100
15
– mA
120
140
20
160
REV. C
SET
S
.
=

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