MAX1535 Maxim Integrated Products, MAX1535 Datasheet - Page 32

• Manufacturer Part Number: MAX1535
• Description: Highly Integrated Level 2 Smbus Battery Charger
• Manufacturer: Maxim Integrated Products

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Highly Integrated Level 2 SMBus
Battery Charger
from DLOV to ground and has a typical impedance of
1Ω sinking and 4Ω sourcing. This helps prevent DLO
from being pulled up when the high-side switch turns
on due to capacitive coupling from the drain to the gate
of the low-side MOSFET. This places some restrictions
on the MOSFETs that can be used. Using a low-side
MOSFET with smaller gate-to-drain capacitance can
prevent these problems.
Table 12 lists the recommended components and
refers to the circuit of Figure 1. The following sections
describe how to select these components.
MOSFETs P2 and P3 (Figure 1) provide power to the
system load when the AC adapter is inserted. These
devices may have modest switching speeds, but must
be able to deliver the maximum input current as set by
R1. As always, care should be taken not to exceed the
device’s maximum voltage ratings at the maximum
operating temperature.
The P-channel/N-channel MOSFETs (P1, N1) are the
switching devices for the step-down regulator. The
guidelines for these devices focus on the challenge of
obtaining high load-current capability when using high-
voltage (>20V) AC adapters. Low-current applications
usually require less attention. The high-side MOSFET
(P1) must be able to dissipate the resistive losses plus
the switching losses at both V
V
Figure 13. CCI Loop Response
32
DCIN(MAX)
______________________________________________________________________________________
100
-20
-40
80
60
40
20
0
. Calculate both these sums.
0.1
10
FREQUENCY (Hz)
1k
Design Procedure
MOSFET Selection
100k
MAG
PHASE
DCIN(MIN)
10M
0
-45
-90
and
Ideally, the losses at V
equal to losses at V
between. If the losses at V
higher than the losses at V
ing the size of P1. Conversely, if the losses at
V
V
does not vary over a wide range, the minimum power
dissipation occurs where the resistive losses equal the
switching losses. Choose a low-side MOSFET that has
Figure 14. CCS Loop Diagram
Figure 15. CCS Loop Response
DCIN(MAX)
IN(MIN)
, consider reducing the size of P1. If DCIN
100
-20
-40
CCS
80
60
40
20
0
CLS
0.1
are significantly higher than the losses at
GMS
C
CS
10
R
DCIN(MAX)
OGMS
FREQUENCY (Hz)
DCIN(MIN)
DCIN(MAX)
1k
DCIN(MIN)
CSS
GM
IN
, with lower losses in
100k
should be roughly
MAG
PHASE
, consider increas-
ADAPTER
SYSTEM
INPUT
LOAD
are significantly
CSSP
CSSN
RS1
10M
0
-45
-90