PIC10F200 Microchip Technology, Inc., PIC10F200 Datasheet - Page 51

• Manufacturer Part Number: PIC10F200
• Description: 6-Pin, 8-Bit Flash Microcontrollersfeatures 6-pin SOT-23 Packaging Precision 4 MHZ Internal Oscillator Baseline Core With 33 Instructions, 2 Stack Levels All Single-cycle Instructions Except For Program Branches Which Are Two Cycles 12-bit Wide
• Manufacturer: Microchip Technology, Inc.

FIGURE 9-9:
9.9
A device may be powered down (Sleep) and later
powered up (wake-up from Sleep).
9.9.1
The Power-down mode is entered by executing a
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (Status<4>) is set, the PD bit
(Status<3>) is cleared and the oscillator driver is turned
off. The I/O ports maintain the status they had before
the SLEEP instruction was executed (driving high,
driving low or high-impedance).
For lowest current consumption while powered down,
the T0CKI input should be at V
MCLR/V
enabled.
 2004 Microchip Technology Inc.
Note:
Note:
V
SS
PP
Power-down Mode (Sleep)
MCP809
RST
pin must be at a logic high level if MCLR is
SLEEP
A Reset generated by a WDT time-out
does not drive the MCLR pin low.
This Brown-out Protection circuit employs
Microchip Technology’s MCP809 micro-
controller supervisor. There are 7 different
trip point selections to accommodate 5V to
3V systems.
V
V
DD
DD
Capacitor
Bypass
BROWN-OUT
PROTECTION CIRCUIT 3
DD
or V
V
PIC10F20X
DD
SS
MCLR
and the GP3/
Preliminary
PIC10F200/202/204/206
9.9.2
The device can wake-up from Sleep through one of
the following events:
1.
2.
3.
4.
These events cause a device Reset. The TO, PD
GPWUF and CWUF bits can be used to determine the
cause of device Reset. The TO bit is cleared if a WDT
time-out occurred (and caused wake-up). The PD bit,
which is set on power-up, is cleared when SLEEP is
invoked. The GPWUF bit indicates a change in state
while in Sleep at pins GP0, GP1 or GP3 (since the last
file or bit operation on GP port). The CWUF bit
indicates a change in the state while in Sleep of the
comparator output.
Note:
Note:
An external Reset input on GP3/MCLR/V
when configured as MCLR.
A Watchdog Timer time-out Reset (if WDT was
enabled).
A change on input pin GP0, GP1 or GP3 when
wake-up on change is enabled.
A comparator output change has occurred when
wake-up on comparator change is enabled.
WAKE-UP FROM SLEEP
Caution: Right before entering Sleep,
read the input pins. When in Sleep, wake-
up occurs when the values at the pins
change from the state they were in at the
last reading. If a wake-up on change
occurs and the pins are not read before re-
entering Sleep, a wake-up will occur
immediately even if no pins change while
in Sleep mode.
The WDT is cleared when the device
wakes from Sleep, regardless of the wake-
up source.
DS41239A-page 49
PP
pin,