ISL6128 Intersil Corporation, ISL6128 Datasheet - Page 5

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ISL6128

Manufacturer Part Number
ISL6128
Description
(ISL6123 - ISL6130) Power Sequencing Controllers
Manufacturer
Intersil Corporation
Datasheet
Absolute Maximum Ratings
V
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
ISL6125 LOGIC OUT. . . . . . . . . . . . . . . . . . . . . -0.3V to V
UVLO, ENABLE, ENABLE#, SYSRST# . . . . . . -0.3V to V
RESET#, DLY_ON, DLYOFF . . . . . . . . . . . . . . . -0.3V to V
Operating Conditions
V
Temperature Range (T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
Electrical Specifications
UVLO
Falling Undervoltage Lockout Threshold
Undervoltage Lockout Threshold Tempco
Undervoltage Lockout Hysteresis
Undervoltage Lockout Threshold Range
Undervoltage Lockout Delay
Transient Filter Duration
DELAY ON/OFF
Delay Charging Current
Delay Charging Current Range
Delay Charging Current Temp. Coeff.
Delay Threshold Voltage
Delay Threshold Voltage Temp. Coeff.
ENABLE/ENABLE#, RESET# & SYSRST# I/O
ENABLE Threshold
ENABLE# Threshold
ENABLE/ENABLE# Hysteresis
ENABLE/ENABLE# Lockout Delay
ENABLE/ENABLE# Input Capacitance
RESET# Pull-up Voltage
RESET# Pull-Down Current
RESET# Delay after GATE High
RESET# Output Low
RESET Output Capacitance
1. θ
2. For θ
3. All voltages are relative to GND, unless otherwise specified.
DD
DD
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . +1.5V to +5.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
PARAMETER
ISL6123, ISL6124, ISL6125, ISL6126, ISL6127, ISL6128, ISL6130
A
) . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
5
V
DD
= 1.5V to +5V, T
TC_DLY_ichg
TC_DLY_Vth
TdelEN_LO
DLY_ichg_r
V
TC
RUVLOvth
TUVLOdel
V
SYMBOL
V
DLY_ichg
DLY_Vth
ENh -
Cout_rst
I
I
I
T
Vpu_rst
UVLOhys
Cin_en
UVLOvth
RSTpd1
RSTpd3
RSTpd5
V
V
V
RSTdel
UVLOvth
TFIL
RSTl
ENh
ENh
V
ENl
A
DD
DD
DD
= T
DD
+0.3V
+0.3V
+0.3V
J
+6V
T
T
Max V
ENABLE satisfied
V
V
DLY_ichg(max) - DLY_ichg(min)
Measured at V
UVLO satisfied
V
V
V
GATE = V
Measured at V
pull-up resistors
= -40°C to +85°C, unless otherwise specified.
J
J
DD
DLY
DD
DD
DD
= +25°C
= -40°C to +85°C
, UVLO, ENABLE glitch filter
= 1.5V, RST = 0.1V
= 3.3V, RST = 0.1V
= 5V, RST = 0.1V
= 0V
TEST CONDITIONS
UVLOvth
DD
+5V
Thermal Information
Thermal Resistance (Typical, Notes 1, 2)
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . +125°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
- Min V
DD
DD
4 x 4 QFN Package . . . . . . . . . . . . . . .
(QFN - Leads Only)
= 1.5V
= 5V with 5k
UVLOvth
1.238
0.92
MIN
619
0.5 V
1.266
TYP
0.08
V
633
160
0.2
0.2
1.2
0.2
40
10
10
30
10
13
17
10
DD
7
1
5
5
DD
θ
JA
(°C/W)
48
1.294
MAX
1.08
647
0.1
February 5, 2007
θ
JC
mV/°C
nV/°C
nA/°C
UNIT
FN9005.8
(°C/W)
mV
mV
mV
mA
mA
mA
9
ms
ms
ms
μA
μA
pF
pF
μs
V
V
V
V
V
V

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