FM1808 Ramtron Corporation, FM1808 Datasheet
FM1808
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FM1808 Summary of contents
Page 1
... SRAM (BBSRAM). Fast write timing and high write endurance make FRAM superior to other types of nonvolatile memory. In-system operation of the FM1808 is very similar to other RAM devices. Minimum read- and write- cycle times are equal. The FRAM memory, however, is nonvolatile due to its unique ferroelectric memory process ...
Page 2
... Address changes that occur after /CE goes low will be ignored until the next falling edge occurs. /OE Input Output Enable: Asserting /OE low causes the FM1808 to drive the data bus when valid data is available. Deasserting /OE high causes the DQ pins to be tri-stated. /WE Input Write Enable: Asserting /WE low causes the FM1808 to write the contents of the data bus to the address location latched by the falling edge of /CE ...
Page 3
... In a /CE controlled write, the /WE signal is asserted prior to beginning the memory cycle. That is, /WE is low when /CE falls. In this case, the part begins the memory cycle as a write. The FM1808 will not drive the data bus regardless of the state of /OE /WE controlled write, the memory cycle begins on the falling edge of /CE ...
Page 4
... The memory architecture is based on an array of rows and columns. Each read or write access causes an endurance cycle for an entire row. In the FM1808, a row is 32 bits wide. Every 4-byte boundary marks the beginning of a new row. Endurance can be optimized by ensuring frequently accessed data is located in different rows ...
Page 5
... Backing up an SRAM with a battery is an old- fashioned approach. In many cases, such modules are the only through-hole component in sight. FRAM is the latest memory technology and it is changing the way systems are designed. FRAM is nonvolatile and writes fast -- no battery required. Rev. 2.3 May 2003 FM1808 Page ...
Page 6
... Each memory access must be qualified with a low transition of /CE. In many cases, this is the only change required. An example of the signal relationships is shown in Figure 2 below. Also shown is a common SRAM signal relationship that will not work for the FM1808. CE FRAM Address Signaling Data ...
Page 7
... The relationship between retention, temperature, and the associated reliability level is characterized in a separate reliability report. Rev. 2.3 May 2003 Description 4.5V to 5.5V unless otherwise specified) DD Min Typ 4.5 5 2.0 -0.3 = -2.0 mA) 2 -4.2 mA) - Min Units 10 years FM1808 Ratings -1.0V to +7.0V -1.0V to +7.0V and V < V +1. - 125 C 300 C Max Units Notes 5 400 ...
Page 8
... First Access Start Last Access Complete Rev. 2.3 May 2003 = 4.5V to 5.5V unless otherwise specified - 4.5V to 5.5V unless otherwise specified 4.5V to 5.5V unless otherwise specified) DD Min 1 (min FM1808 -70 Units Notes Min Max 2,000 ns 130 ...
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... May 2003 = 5V) DD Min Max Units - Equivalent AC Load Circuit 1. FM1808 Notes Page ...
Page 10
... (min) DD (min) DD (min (min) IH (min) IH (min) FM1808 (min) DD (min) DD (min (max) IL (max) IL (max) Page ...
Page 11
... L mm in. Rev. 2.3 May 2003 Min Nom. Max 2.35 2.65 0.0926 0.1043 0.10 0.30 0.004 0.0118 0.33 0.51 0.013 0.020 0.23 0.32 0.0091 0.0125 17.70 18.10 0.6969 0.7125 7.40 7.60 0.2914 0.2992 1.27 BSC 0.050 BSC 10.00 10.65 0.394 0.419 0.25 0.75 0.010 0.029 .40 1.27 0.016 0.050 0 8 FM1808 . .004 in. Page ...
Page 12
... L in. mm Rev. 2.3 May 2003 Min Nom. Max 0.250 6.35 0.015 0.39 0.125 0.195 3.18 4.95 0.014 0.022 0.356 0.558 0.030 0.070 0.77 1.77 1.380 1.565 35.1 39.7 0.005 0.13 0.600 0.625 15.24 15.87 0.485 0.580 12.32 14.73 0.100 BSC 2.54 BSC 0.600 BSC 15.24 BSC 0.700 17.78 0.115 0.200 2.93 5.08 FM1808 Page ...