FM1808 Ramtron Corporation, FM1808 Datasheet - Page 2

• Manufacturer Part Number: FM1808
• Description: Density = 256Kbit ;; Interface = Parallel ;; Speed = 70ns ;; VDD = 5V
• Manufacturer: Ramtron Corporation

Pin Description
Functional Truth Table
Note: The /OE pin controls only the DQ output buffers.
Rev. 2.3
May 2003
Pin Name
A0-A14
DQ0-7
/CE
/OE
/WE
VDD
VSS
/CE
H
L
L
WE
OE
CE
A0-A14
Supply
Supply
/WE
Type
Input
Input
Input
Input
I/O
X
X
H
Address
Latch
Control
Description
Address: The 15 address lines select one of 32,768 bytes in the FRAM array. The
address value is latched on the falling edge of /CE.
Data: 8-bit bi-directional data bus for accessing the FRAM array.
Chip Enable: /CE selects the device when low. Asserting /CE low causes the
address to be latched internally. Address changes that occur after /CE goes low
will be ignored until the next falling edge occurs.
Output Enable: Asserting /OE low causes the FM1808 to drive the data bus when
valid data is available. Deasserting /OE high causes the DQ pins to be tri-stated.
Write Enable: Asserting /WE low causes the FM1808 to write the contents of
the data bus to the address location latched by the falling edge of /CE.
Supply Voltage: 5V
Ground
Logic
Function
Standby/Precharge
Latch Address (and Begin Write if /WE=low)
Read
Write
A10-A14
A0-A7
A8-A9
Figure 1. Block Diagram
Decoder
Row
32,768 x 8 FRAM Array
Column Decoder
Block Decoder
Bus Driver
I/O Latch
DQ0-7
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FM1808