IDT72V3670L10PF IDT, Integrated Device Technology Inc, IDT72V3670L10PF Datasheet
IDT72V3670L10PF
Specifications of IDT72V3670L10PF
800-1536
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IDT72V3670L10PF Summary of contents
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FEATURES: • • • • • Choose among the following memory organizations: ⎯ ⎯ ⎯ ⎯ ⎯ IDT72V3640 1,024 x 36 ⎯ ⎯ ⎯ ⎯ ⎯ IDT72V3650 2,048 x 36 ⎯ ⎯ ⎯ ⎯ ⎯ IDT72V3660 4,096 x 36 ⎯ ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 DESCRIPTION: The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 WCLK when WEN is asserted. During Asynchronous operation only the WR input is used to ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 words written to the FIFO do require a LOW on REN for access. The state ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 asynchronous PAE/PAF configuration is selected, the PAE is asserted LOW on the LOW-to-HIGH transition ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 PIN DESCRIPTION (TQFP AND PBGA PACKAGES) Symbol Name I/O (1) BM Bus-Matching I BM works ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 PIN DESCRIPTION-CONTINUED (TQFP & PBGA PACKAGES) Symbol Name I/O SEN SEN enables serial loading of ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 ABSOLUTE MAXIMUM RATINGS Symbol Rating (2) V Terminal Voltage TERM with respect to GND T ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 ELECTRICAL CHARACTERISTICS (Commercial 3.3V ± 0.15V 0°C to +70°C;Industrial: V ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 ELECTRICAL CHARACTERISTICS (Commercial 3.3V ± 0.15V 0°C to +70°C;Industrial: V ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 TEST CONDITIONS Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 FUNCTIONAL DESCRIPTION TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH (FWFT) MODE The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690 ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 TABLE 2 — DEFAULT PROGRAMMABLE FLAG OFFSETS IDT72V3640, 72V3650 LD FSEL1 FSEL0 ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 TABLE 3 ⎯ STATUS FLAGS FOR IDT STANDARD MODE IDT72V3640 0 Number of (1) 1 ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 WEN ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 1st Parallel Offset Write/Read Cycle D/Q35 D/Q19 D/Q17 EMPTY OFFSET REGISTER (PAE ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 SERIAL PROGRAMMING MODE If Serial Programming mode has been selected, as described above, then programming ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 was HIGH before setup. During this period, the internal read pointer is initialized ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 SIGNAL DESCRIPTION INPUTS: DATA Data inputs for 36-bit ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 not there are any words present in the FIFO memory. It also uses the Full ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 BIG-ENDIAN/LITTLE-ENDIAN ( BE ) During Master Reset, a LOW on BE will select Big-Endian operation. ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 asynchronous PAE configuration is selected, the PAE is asserted LOW on the LOW-to-HIGH transition ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 BYTE ORDER ON INPUT PORT: BYTE ORDER ON OUTPUT PORT ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 BYTE ORDER ON INPUT PORT: BYTE ORDER ON OUTPUT PORT ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 MRS t RSS REN t RSS WEN t RSS FWFT/SI t RSS LD t RSS ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 PRS t RSS REN t RSS WEN t RSS RT t RSS SEN EF/OR FF/IR ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 WRITE WCLK 1 (1) t SKEW1 WEN RCLK ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 36-BIT FIFO COMMERCIAL AND INDUSTRIAL 28 TEMPERATURE RANGES OCTOBER 22, 2008 ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 36-BIT FIFO COMMERCIAL AND INDUSTRIAL 29 TEMPERATURE RANGES OCTOBER 22, 2008 ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 RCLK t t ENS ENH t RTS REN ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 RCLK t t ENH ENS t RTS REN ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 RCLK t ENS REN WCLK ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 RCLK t ENS REN x+1 WCLK t ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 WCLK LD WEN NOTE: 1. This timing diagram illustrates programming ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 CLKH CLKL WCLK t t ENS ENH WEN (2) n words in FIFO ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 CLKH WCLK WEN n words in FIFO PAE words in FIFO ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 RCLK REN FFA NOTE: ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 Write WCLK 1 WEN SKEW t CYL ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 CYC t t CYH CYL Last ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 OPTIONAL CONFIGURATIONS WIDTH EXPANSION CONFIGURATION Word width may be increased simply by connecting together the ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 FWFT/SI FWFT/SI WRITE CLOCK WCLK IDT 72V3640 WRITE ENABLE WEN 72V3650 72V3660 INPUT READY IR ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 TCK TDI/ TMS TDO t 6 TRST t 5 SYSTEM INTERFACE ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 JTAG INTERFACE Five additional pins (TDI, TDO, TMS, TCK and TRST) are provided to support ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 Input = TMS NOTES: 1. Five consecutive TCK cycles with TMS = 1 ...
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IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36 THE INSTRUCTION REGISTER The Instruction register allows an instruction to be shifted in serially into ...
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ORDERING INFORMATION XXXXX X XX Device Type Power Speed Package NOTES: 1. Industrial temperature range product for 7-5ns and 15ns are available as standard device. All other speed grades are available by special order. 2. Green parts are available. For ...