HT48R02M Holtek Semiconductor, HT48R02M Datasheet - Page 50

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HT48R02M

Manufacturer Part Number
HT48R02M
Description
(HT4xR0xM) 1.5V Battery 8-Bit OTP MCU
Manufacturer
Holtek Semiconductor
Datasheet
www.DataSheet4U.com
Timer/Event Counter Interrupt
For a Timer/Event Counter interrupt to occur, the global
interrupt enable bit, EMI, and the corresponding timer
interrupt enable bit, TnE, must first be set. An actual
Timer/Event Counter interrupt will take place when the
Timer/Event Counter request flag, TnF, is set, a situation
that will occur when the relevant Timer/Event Counter
overflows. When the interrupt is enabled, the stack is
not full and a Timer/Event Counter n overflow occurs, a
subroutine call to the relevant timer interrupt vector, will
take place. When the interrupt is serviced, the timer in-
terrupt request flag, TnF, will be automatically reset and
the EMI bit will be automatically cleared to disable other
interrupts.
Time Base Interrupt
For a time base interrupt to occur the global interrupt en-
able bit EMI and the corresponding interrupt enable bit
TBE, must first be set. An actual Time Base interrupt will
take place when the time base request flag TBF is set, a
situation that will occur when the Time Base overflows.
When the interrupt is enabled, the stack is not full and a
time base overflow occurs a subroutine call to time base
vector will take place. When the interrupt is serviced, the
time base interrupt flag. TBF will be automatically reset
and the EMI bit will be automatically cleared to disable
other interrupts.
DC/DC Converter
This device embedded a set of PFM step-up DC/DC
converter with high efficiency and low ripple. The fea-
tures extremely low start-up voltage and high output
voltage accuracy. It requires only three external compo-
nents to provide a fixed output voltage of 3.0V for the ap-
plication system. CMOS technology ensures ultra low
supply current and makes it ideal for battery-operated
applications powered from one or more cells.
Rev. 1.00
Bit 7~6
Bit 5
Bit 4~2
Bit 1
Bit 0
HT48R01M/HT48R02M
Name
POR
R/W
Bit
unimplemented, read as 0
TBF: Time Base event interrupt request flag
0: inactive
1: active
unimplemented, read as 0
TBE: Time base event interrupt enable
0: disable
1: enable
unimplemented, read as 0
7
6
HT46R01M/HT46R02M/HT48R01M/HT48R02M
R/W
TBF
5
0
50
4
The DC/DC converetr consists of an oscillator, a PFM
control circuit, a driver transistor, a reference voltage
unit, and a high speed comparator. It employs pulse fre-
quency modulation (PFM) for minimum supply current
and ripple at light output loading. It also build-in a chip
enable function to reduce power consumption during
shutdown mode.
Programming Considerations
By disabling the interrupt enable bits, a requested inter-
rupt can be prevented from being serviced, however,
once an interrupt request flag is set, it will remain in this
condition in the interrupt register until the corresponding
interrupt is serviced or until the request flag is cleared by
a software instruction.
It is recommended that programs do not use the CALL
subroutine instruction within the interrupt subroutine.
Interrupts often occur in an unpredictable manner or
need to be serviced immediately in some applications. If
only one stack is left and the interrupt is not well con-
trolled, the original control sequence will be damaged
once a CALL subroutine is executed in the interrupt
subroutine.
All of these interrupts have the capability of waking up
the processor when in the Sleep Mode.
Only the Program Counter is pushed onto the stack. If
the contents of the register or status register are altered
by the interrupt service program, which may corrupt the
desired control sequence, then the contents should be
saved in advance.
3
2
TBE
R/W
1
0
December 18, 2009
0

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