CY2412 Cypress Semiconductor, CY2412 Datasheet - Page 3

• Manufacturer Part Number: CY2412
• Description: MPEG Clock Generator with VCXO
• Manufacturer: Cypress Semiconductor

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Document #: 38-07227 Rev. *D
Absolute Maximum Conditions
Recommended Operating Conditions
DC Electrical Characteristics
AC Electrical Characteristics
V
T
T
V
T
C
f
t
I
I
C
I
f
V
f
I
Notes:
REF
PU
OH
OL
IZ
∆XO
VBW
DD
Parameter
2. Float X
3. Rated for ten years.
4. Not 100% tested.
S
J
A
Parameter
DD
DD
VCXO
LOAD
IN
Parameter
Parameter
DC
ER
EF
t
t
10
9
OUT
[4]
if X
IN
Output High Current
Output Low Current
Input Capacitance
Input Leakage Current
VCXO pullability range
VCXO input range
VCXO input bandwidth
Supply Current
Output Duty Cycle
Rising Edge Rate
Falling Edge Rate
Clock Jitter
PLL Lock Time
is externally driven.
Supply Voltage
Storage Temperature
Junction Temperature
Digital Inputs
Digital Outputs referred to V
Electrostatic Discharge
Operating Voltage
Ambient Temperature
Max. Load Capacitance
Reference Frequency
Power-up time for all VDDs to reach
minimum specified voltage (power
ramps must be monotonic)
Description
Description
Description
Description
[3]
Duty Cycle is defined in Figure 1, 50% of V
Clock Edge Rate, Measured from 20% to 80%
of V
Output Clock Edge Rate, Measured from 80% to
20% of V
Peak to Peak period jitter
V
V
Sum of Core and Output Current
DD,
OH
OL
DD
C
= 0.5, V
= V
LOAD
DD,
DD
C
LOAD
Test Conditions
= 15 pF. See Figure 2.
Test Conditions
– 0.5, V
DD
= 3.3V
= 15 pF. See Figure 2.
Min.
3.14
0.05
V
V
DD
0
SS
SS
Min.
–0.5
–65
= 3.3V
–
2
– 0.3
– 0.3
Typ.
13.5
3.3
DD
+150
Min.
12
12
0
Min.
0.8
0.8
V
V
45
DD
DD
Max.
DC to 200
125
125
7.0
+ 0.3
+ 0.3
Typ.
24
24
5
Max.
3.47
Typ.
500
100
1.4
1.4
70
15
50
Max.
Max.
V
200
55
35
3
7
DD
CY2412
Page 3 of 6
MHz
Unit
Unit
ms
°C
pF
kV
V
°C
°C
V
V
V
V/ns
V/ns
Unit
Unit
ppm
kHz
mA
mA
mA
ms
pF
µA
ps
%
V