ST62T45B STMicroelectronics, ST62T45B Datasheet - Page 51

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ST62T45B

Manufacturer Part Number
ST62T45B
Description
8-BIT OTP/EPROM MCU
Manufacturer
STMicroelectronics
Datasheet

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LCD CONTROLLER-DRIVER (Continued)
4.5.4 Stand by or STOP operation mode
No clock from the main oscillator is available in
STOP mode for the LCD controller, and the con-
troller is switched off when the STOP instruction is
executed. All segment and common lines are then
switched to ground to avoid any DC biasing of the
LCD elements.
Operation in STOP mode remain possible by
switching to the OSC32Khz, by setting the
HF0..HF2 bit of LCDCR accordingly ( Table 20).
Care must be taken for the oscillator switching that
LCD function change is only effective at the end of
a frame. Therefore it must be guaranteed that
enough clock pulses are delivered before entering
into STOP mode. Otherwise the LCD function is
switched off at STOP instruction execution.
Table 20. Oscillator Source Selection
4.5.5 LCD Mode Control Register (LCDCR)
Address: DCh - Read/Write
Bits 7-6 = DS0, DS1. Multiplexing ratio select bits .
These bits select the number of common back-
planes used by the LCD control.
HF2
0
0
0
1
Others
HF1
0
0
1
1
HF0
0
1
0
1
Clock disabled: Display off
Auxiliary 32kHz oscillator
Reserved
Reserved
Division from MCU f
Division Factor
INT
Bits 5-3 = HF0, HF1, HF2. Oscillator select bits .
These bits allow the LCD controller to be supplied
with the correct frequency when different high
main oscillator frequencies are selected as sys-
tem clock. Table 17 shows the set-up for different
clock crystals.
Bits 2-0 = LF0, LF1, LF2. Base frame frequency
select bits. These bits control the LCD base oper-
ational frequency of the LCD common lines.
LF0, LF1, LF2 define the 32kHz division factor as
shown in Table 21
Table 21. 32kHz Division Factor for Base
Frequency Selection
LF2
DS1
0
0
0
0
1
1
1
1
7
LF1
DS0
0
0
1
1
0
0
1
1
LF0
0
1
0
1
0
1
0
1
HF2
512
386
256
192
128
96
64
Reserved
HF1
32kHz Division Factor
HF0
ST62T45B/E45B
LF2
LF1
51/72
LF0
0
50

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