MX29LV002NCT Macronix International, MX29LV002NCT Datasheet - Page 11

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MX29LV002NCT

Manufacturer Part Number
MX29LV002NCT
Description
2M-BIT [256K x 8] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
Manufacturer
Macronix International
Datasheet
SECTOR ERASE COMMANDS
The Automatic Sector Erase does not require the de-
vice to be entirely pre-programmed prior to executing
the Automatic Sector Erase Set-up command and Au-
tomatic Sector Erase command. Upon executing the
Automatic Sector Erase command, the device will auto-
matically program and verify the sector(s) memory for
an all-zero data pattern. The system is not required to
provide any control or timing during these operations.
When the sector(s) is automatically verified to contain
an all-zero pattern, a self-timed sector erase and verify
begin. The erase and verify operations are complete
when the data on Q7 is "1" and the data on Q6 stops
toggling for two consecutive read cycles, at which time
the device returns to the Read mode. The system is not
required to provide any control or timing during these
operations.
When using the Automatic sector Erase algorithm, note
that the erase automatically terminates when adequate
erase margin has been achieved for the memory array
Table 7. Write Operation Status
Note:
1. Q7 and Q2 require a valid address when reading status information. Refer to the appropriate subsection for further details.
2. Q5 switches to '1' when an Auto Program or Auto Erase operation has exceeded the maximum timing limits.
P/N:PM1204
In Progress
Exceeded
Time Limits
See "Q5:Exceeded Timing Limits " for more information.
Status
Byte Program in Auto Program Algorithm
Auto Erase Algorithm
Erase Suspended Mode
Byte Program in Auto Program Algorithm
Erase Suspend Program
Auto Erase Algorithm
MX29LV002C/002NC T/B
Erase Suspend Read
(Erase Suspended Sector)
Erase Suspend Read
(Non-Erase Suspended Sector)
Erase Suspend Program
11
(no erase verification command is required). Sector erase
is a six-bus cycle operation. There are two "unlock" write
cycles. These are followed by writing the set-up com-
mand 80H. Two more "unlock" write cycles are then fol-
lowed by the sector erase command 30H. The sector
address is latched on the falling edge of WE# or CE#,
whichever happens later, while the command (data) is
latched on the rising edge of WE# or CE#, whichever
happens first. Sector addresses selected are loaded
into internal register on the sixth falling edge of WE# or
CE#, whichever happens later. Each successive sector
load cycle started by the falling edge of WE# or CE#,
whichever happens later must begin within 50us from
the rising edge of the preceding WE# or CE#, whichever
happens first. Otherwise, the loading period ends and
internal auto sector erase cycle starts. (Monitor Q3 to
determine if the sector erase timer window is still open,
see section Q3, Sector Erase Timer.) Any command other
than Sector Erase(30H) or Erase Suspend(B0H) during
the time-out period resets the device to read mode.
(Note1)
Data
Q7#
Q7#
Q7#
Q7#
Q7
0
1
0
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Data
Q6
No
(Note2)
Data Data Data
Q5
0
0
0
0
1
1
1
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N/A
N/A Toggle
N/A
N/A
N/A
Q3
1
1
REV. 1.0, JUN. 30, 2005
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Toggle
Toggle
Toggle
N/A
N/A
Q2
No
No
RY/BY#
0
0
1
1
0
0
0
0

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