MX29LV640BT Macronix International, MX29LV640BT Datasheet - Page 17

• Manufacturer Part Number: MX29LV640BT
• Description: 64M-BIT [8M x 8/4M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY
• Manufacturer: Macronix International

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switch themselves to low power mode when
MX29LV640BT/BB addresses remain stable during ac-
cess time of tACC+30ns. It is not necessary to control
CE#, WE#, and OE# on the mode. Under the mode, the
current consumed is typically 0.2uA (CMOS level).
AUTOMATIC SLEEP MODE
The automatic sleep mode minimizes Flash device en-
ergy consumption. The device automatically enables this
mode when address remain stable for tACC+30ns. The
automatic sleep mode is independent of the CE#, WE#,
and OE# control signals. Standard address access tim-
ings provide new data when addresses are changed. While
in sleep mode, output data is latched and always avail-
able to the system. ICC4 in the DC Characteristics table
represents the automatic sleep mode current specifica-
tion.
OUTPUT DISABLE
With the OE# input at a logic high level (VIH), output
from the devices are disabled. This will cause the output
pins to be in a high impedance state.
RESET# OPERATION
The RESET# pin provides a hardware method of resetting
the device to reading array data. When the RESET# pin
is driven low for at least a period of tRP, the device
immediately terminates any operation in progress,
tristates all output pins, and ignores all read/write
commands for the duration of the RESET# pulse. The
device also resets the internal state machine to reading
array data. The operation that was interrupted should be
reinitiated once the device is ready to accept another
command sequence, to ensure data integrity
Current is reduced for the duration of the RESET# pulse.
When RESET# is held at VSS 0.3V, the device draws
CMOS standby current (ICC4). If RESET# is held at VIL
but not within VSS 0.3V, the standby current will be
greater.
The RESET# pin may be tied to system reset circuitry.
A system reset would that also reset the Flash memory,
enabling the system to read the boot-up firmware from
the Flash memory.
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17
If RESET# is asserted during a program or erase
operation, the RY/BY# pin remains a "0" (busy) until the
internal reset operation is complete, which requires a time
of tREADY. The system can thus monitor RY/BY# to
determine whether the reset operation is complete. If
RESET# is asserted when a program or erase operation
is completed within a time of tREADY. The system can
read data tRH after the RESET# pin returns to VIH.
Refer to the AC Characteristics tables for RESET#
parameters and to Figure 3 for the timing diagram.
SECTOR GROUP PROTECT OPERATION
The MX29LV640BT/BB features hardware sector group
protection. This feature will disable both program and
erase operations for these sector group protected. In this
device, a sector group consists of four adjacent sectors
which are protected or unprotected at the same time. To
activate this mode, the programming equipment must force
VID on address pin A9 and control pin OE#, (suggest
VID = 12V) A6 = VIL and CE# = VIL. (see Table 2) Pro-
gramming of the protection circuitry begins on the falling
edge of the WE# pulse and is terminated on the rising
edge. Please refer to sector group protect algorithm and
waveform.
MX29LV640BT/BB also provides another method. Which
requires VID on the RESET# only. This method can be
implemented either in-system or via programming equip-
ment. This method uses standard microprocessor bus
cycle timing.
To verify programming of the protection circuitry, the pro-
gramming equipment must force VID on address pin A9
( with CE# and OE# at VIL and WE# at VIH). When
A1=1, it will produce a logical "1" code at device output
Q0 for a protected sector. Otherwise the device will pro-
duce 00H for the unprotected sector. In this mode, the
addresses, except for A1, are don't care. Address loca-
tions with A1 = VIL are reserved to read manufacturer
and device codes. (Read Silicon ID)
It is also possible to determine if the group is protected
in the system by writing a Read Silicon ID command.
Performing a read operation with A1=VIH, it will produce
a logical "1" at Q0 for the protected sector.
CHIP UNPROTECT OPERATION
The MX29LV640BT/BB also features the chip unprotect
MX29LV640BT/BB
REV. 1.2, SEP. 07, 2005