74LCX74M Fairchild Semiconductor, 74LCX74M Datasheet - Page 12

IC FLIP FLOP LV DUAL D 14-SOIC

74LCX74M

Manufacturer Part Number
74LCX74M
Description
IC FLIP FLOP LV DUAL D 14-SOIC
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Type
D-Typer
Datasheets

Specifications of 74LCX74M

Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
150MHz
Delay Time - Propagation
7ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Number Of Circuits
2
Logic Family
74LC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
8 ns
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Flip-flop Type
D
Propagation Delay
7ns
Frequency
150MHz
Output Current
24mA
Ic Output Type
Complementary
Supply Voltage Range
2V To 3.6V
Logic Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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©1995 Fairchild Semiconductor Corporation
74LCX74 Rev. 1.7.0
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
A. CONFORMS TO JEDEC REGISTRATION MO-153,
B. DIMENSIONS ARE IN MILLIMETERS
E. LANDPATTERN STANDARD: SOP65P640X110-14M
D. DIMENSIONING AND TOLERANCES PER ANSI
F. DRAWING FILE NAME: MTC14REV6
AND TIE BAR EXTRUSIONS
VARIATION AB, REF NOTE 6
Y14.5M, 1982
Figure 6. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
0.43 TYP
(Continued)
12
0.65
R0.09 min
0.45
1.65
1.00
R0.09min
12.00°
TOP & BOTTOM
6.10
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