si5325 Silicon Laboratories, si5325 Datasheet - Page 7

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si5325

Manufacturer Part Number
si5325
Description
?p-programmable Precision Clock Multiplier
Manufacturer
Silicon Laboratories
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
si5325C-C-GM
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
2. Pin Descriptions: Si5325
Pin numbers are preliminary and subject to change.
2, 7, 9, 14,
Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5325 Register Map.
18, 30, 33
Pin #
1
3
Pin Name
INT_C1B
RST
NC
I/O
O
I
INT_C1B
Table 3. Si5325 Pin Descriptions
Signal Level
GND
GND
VDD
RST
C2B
NC
NC
NC
LVCMOS
LVCMOS
1
2
3
4
5
6
7
8
9
36
10 11 12 13 14 15 16 17
Preliminary Rev. 0.3
35
34
33
External Reset.
Active low input that performs external hardware reset of
device. Resets all internal logic to a known state and forces
the device registers to their default value. Clock outputs are
tristated during reset. The part must be programmed after a
reset or power-on to get a clock output. See Family Refer-
ence Manual for details.
This pin has a weak pull-up.
No Connect.
This pin must be left unconnected for normal operation.
Interrupt/CKIN1 Invalid Indicator.
This pin functions as a device interrupt output or an alarm
output for CKIN1. If used as an interrupt output, INT_PIN
must be set to 1. The pin functions as a maskable interrupt
output with active polarity controlled by the INT_POL register
bit.
If used as an alarm output, the pin functions as a LOS (and
optionally FOS) alarm indicator for CKIN1. Set
CK1_BAD_PIN = 1 and INT_PIN = 0.
0 = CKIN1 present.
1 = LOS (FOS) on CKIN1.
The active polarity is controlled by CK_BAD_POL. If no func-
tion is selected, the pin tristates.
GND
Pad
32
31
30
29
28
18
27
26
25
24
23
22
21
20
19
SDI
A2_SS
A1
A0
SDA_SDO
SCL
CS_CA
GND
GND
Description
Si5325
7

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