isl62881 Intersil Corporation, isl62881 Datasheet
isl62881
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isl62881 Summary of contents
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... ISL62881, ISL62881B The ISL62881 is a single-phase PWM buck regulator for miroprocessor or graphics processor core power supply. It uses an integrated gate drivers to provide a complete solution. The PWM modulator of ISL62881 is based on 3 Intersil's Robust Ripple Regulator (R Compared with traditional modulators, the R modulator commands variable switching frequency during load transients, achieving faster transient response ...
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... GPU core application. VR_TT# Thermal overload output indicator. NTC Thermistor input to VR_TT# circuit resistor from this pin to COMP programs the switching frequency (8kΩ gives approximately 300kHz). 2 ISL62881, ISL62881B VID1 21 PGOOD 20 VID0 RBIAS 19 VCCP VR_TT# ...
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... VR_ON Voltage regulator enable input. A high level logic signal on this pin enables the regulator. DPRSLPVR A high level logic signal on this pin puts the ISL62881 in 1-phase diode emulation mode application), this pin also controls V V slews at 5mV/µs for DPRSLPVR = 0 and 10mV/µs core for DPRSLPVR = 1 ...
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... WOC COMP CURRENT 2.5 60µA COMPARATORS X OC Σ VDD 6µA 54µA 1.20V VR_TT# 1.24V NTC ISL62881B ONLY BOOT DRIVER UGATE PHASE SHOOT THROUGH PROTECTION VCCP DRIVER LGATEA VSSP ISL62881 ONLY DRIVER LGATEB ISL62881B ADJ. OCP ONLY COMP THRESHOLD GND October 26, 2009 FN6924.0 ...
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... Current-Sense Amplifier Input Offset Error Amp DC Gain (Note 6) Error Amp Gain-Bandwidth Product (Note 6) 5 ISL62881, ISL62881B Thermal Information Thermal Resistance (Typical, Notes 4, 5)θ TQFN Package TQFN Package Maximum Junction Temperature . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . -65°C to +150°C Pb-Free Reflow Profile ...
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... UGATE Pull-Up Resistance R (Note 6) UGATE Source Current I UGSRC (Note 6) UGATE Sink Resistance R (Note 6) UGATE Sink Current (Note 6) I UGSNK LGATE DRIVER For ISL62881 LGATE Pull-Up Resistance R (Note 6) LGATE Source Current I LGSRC (Note 6) LGATE Sink Resistance R (Note 6) LGATE Sink Current (Note 6) I LGSNK ...
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... VR_ON Input High V IH(1.0V) VID0-VID6 and DPRSLPVR V IL(1.0V) Input Low VID0-VID6 and DPRSLPVR V IH(1.0V) Input High THERMAL MONITOR (For ISL62881B) NTC Source Current Over-Temperature Threshold VR_TT# Low Output Resistance CLK_EN# OUTPUT LEVELS CLK_EN# Low Output Voltage CLK_EN# Leakage Current CURRENT MONITOR IMON Output Current ...
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... FL Simplified Application Circuits < 0:6 > FIGURE 1. ISL62881 TYPICAL APPLICATION CIRCUIT USING DCR SENSING 8 ISL62881, ISL62881B UGFLGR ...
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... Simplified Application Circuits PGOOD CLK_EN# VID<0:6> DPRSLPVR VR_ON VCC VSS IMON FIGURE 2. ISL62881 TYPICAL APPLICATION CIRCUIT USING RESISTOR SENSING < > ...
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... Simplified Application Circuits VR_TT# PGOOD CLK_EN# VID<0:6> DPRSLPVR VR_ON R DROOP VCC SENSE VSS SENSE IMON FIGURE 4. ISL62881B TYPICAL APPLICATION CIRCUIT USING RESISTOR SENSING 10 ISL62881, ISL62881B (Continued) V+5 V VCCP V BIAS BIAS NTC O C VR_TT# PGOOD CLK_EN# VIDS DPRSLPVR VR_ON VW ISL62881B ...
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... PWM pulse is held off until needed. The VW voltage falls as the VW voltage falls, reducing the current PWM pulse width. This kind of behavior gives the ISL62881 excellent response speed. ™ protocol. It uses Intersil patented ™ ...
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... Figure 10 shows the typical start-up timing when the ISL62881 is configured for CPU VR application. The ISL62881 uses digital soft-start to ramp up DAC to the boot voltage of 1.1V at about 2.5mV/µs. Once the output voltage is within 10% of the boot voltage for 13 PWM cycles (43µ ...
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... DD Figure 11 shows the typical start-up timing when the ISL62881 is configured for GPU VR application. The ISL62881 uses digital soft-start to ramp-up DAC to the voltage set by the VID pins at 5mV/µs. Once the output voltage is within 10% of the target voltage for 13 PWM cycles (43µs for frequency = 300kHz), CLK_EN# is pulled low ...
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... VID table value by an amount 1 1 0.2125 proportional to the load current to achieve the load line. The ISL62881 can sense the inductor current through the 0 0 0.2000 intrinsic DC Resistance (DCR) resistance of the inductors 0 1 0.1875 ...
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... DPRSLPVR pin. The slew rate is 5mV/µs when DPRSLPVR = 0 and is 10mV/µs when DPRSLPVR = 1. When the ISL62881 mode, it will actively drive the output voltage up when the VID changes to a higher value. It’ll resume DE mode operation after reaching the new voltage level ...
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... PGOOD overvoltage protection. If the output voltage exceeds the VID set value by +200mV for 1ms, the ISL62881 will declare a fault and de-assert PGOOD. The ISL62881 takes the same actions for all of the above fault protections: deassertion of PGOOD and turn-off of the high-side and low-side power MOSFETs. Any residual inductor current will decay through the MOSFET body diodes ...
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... Key Component Selection R BIAS voltage DS(ON) The ISL62881 uses a resistor (1% or better tolerance is recommended) from the RBIAS pin to GND to establish highly accurate reference current sources inside the IC. Using R = 147kΩ sets the controller for CPU core BIAS application and using R GPU core application ...
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... A (s) has a pole ω and a zero ω cs sns to match ω and ω (s) is unity gain at all L sns cs frequencies. By forcing ω equal to ω L the solution, Equation 12 gives ISL62881, ISL62881B ( -------------------------------------------------------------- - n R ----------------------------------------- - (EQ × (EQ. 8) (EQ. 9) FIGURE 14. DESIRED LOAD TRANSIENT RESPONSE (EQ ...
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... C is the capacitor used to match the inductor time n constant. It usually takes the parallel of two (or more) capacitors to get the desired value. Figure 18 shows 19 ISL62881, ISL62881B that two capacitors C Resistor R ring back. At steady state, C desired C the effective capacitance is less because R the impedance of the C ...
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... For resistor sensing, Equation 20 gives the DC relationship of V (s) and I (s × sen o 20 ISL62881, ISL62881B Substitution of Equation 20 into Equation 1 gives Equation 21: (EQ. 13 droop Therefore: (EQ. 14) 2R --------------------------- - Substitution of Equation 22 and application of the OCP (EQ. 15) condition in Equation 18 gives: ...
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... The spreadsheet gives is shown in both T1(s) and T2(s) plots. However, only T2(s) can be imon actually measured on an ISL62881 regulator. (EQ. 27) T1(s) is the total loop gain of the voltage loop and the droop loop. It always has a higher crossover frequency than T2(s) and has more meaning of system stability. ...
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... Similar behavior occurs during the down transition. To control V slew rate during 1-tick VID transition, core one can add the R -C branch, whose current I vid vid cancels I . droop_vid 22 ISL62881, ISL62881B When V induced droop Vcore where C vid In the meantime, the R OPTIONAL domain expression is as shown in Equation 32 ...
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... COMP Place compensator components (C3, C5, C6 R7, R11, R10 and C11) in general proximity of the controller ISL62881, ISL62881B For example, given Panasonic NTC thermistor with B = 4700, the resistance will drop to 0.03322 of its nominal at +105°C, and drop to 0.03956 of its nominal at +100°C. If the required temperature hysteresis is +105° ...
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... Cut the power ground plane to avoid overlapping with phase node copper. Minimize the loop consisting of input capacitor, high-side MOSFETs and low-side MOSFETs (e.g.: C27, C33, Q2, Q8, Q3 and Q9). 24 ISL62881, ISL62881B LAYOUT CONSIDERATION next to inductor (L1 senses the inductor temperature correctly. 42 INDUCTOR ...
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... IN VID2 IN VID3 IN VID4 IN VID5 IN VID6 IN VR_ON IN DPRSLPVR IN +3.3V IN PGOOD OUT OPTIONAL 1 CLK_EN# ---- 2 PGOOD R16 3 RBIAS U6 47K 4 VW ---- 5 COMP ISL62881HRZ 6 FB OPTIONAL ---- 7 VSEN C6 R10 C11 EP 29 15PF 2.37K 270PF C3 R7 R11 R20 100PF 422K 6.98K ---- R17 OPTIONAL 0 ---- VCORE IN 10 VCCSENSE IN ---- VSSSENSE IN R18 ...
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... VID3 IN VID4 IN VID5 IN VID6 IN VR_ON IN DPRSLPVR IN +3.3V IN CLK_EN# OUT PGOOD OUT OPTIONAL 1 ---- CLK_EN# 2 PGOOD R16 3 RBIAS U6 147K 4 VW ---- 5 COMP ISL62881HRZ 6 FB OPTIONAL ---- 7 VSEN C6 R10 C11 EP 29 27PF 4.87K 470PF C3 R7 R11 R20 100PF 422K 4.22K ---- R17 ---- 0 VCORE IN 10 VCCSENSE IN OPTIONAL ---- VSSSENSE IN ...
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... Thick Film Chip Resistor R41 2.61k Thick Film Chip Resistor R42 10k NTC Thermistor, 10k NTC 1 R50 34k Thick Film Chip Resistor ISL62881, ISL62881B DESCRIPTION MANUFACTURER GENERIC GENERIC GENERIC GENERIC GENERIC GENERIC GENERIC GENERIC GENERIC SANYO GENERIC ...
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... Thick Film Chip Resistor R17, R18 10 Thick Film Chip Resistor R19 1.91k Thick Film Chip Resistor R26 82.5 Thick Film Chip Resistor ISL62881, ISL62881B DESCRIPTION MANUFACTURER GENERIC GENERIC GENERIC INTERSIL DESCRIPTION MANUFACTURER GENERIC GENERIC GENERIC GENERIC GENERIC GENERIC ...
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... Thick Film Chip Resistor R63 3.65k Thick Film Chip Resistor 412k Thick Film Chip Resistor R109, R110, DNP R4, R8 IMVP-6.5 PWM Controller 29 ISL62881, ISL62881B DESCRIPTION MANUFACTURER GENERIC GENERIC GENERIC GENERIC GENERIC PANASONIC GENERIC GENERIC GENERIC GENERIC INTERSIL (Continued) PART NUMBER PACKAGE ...
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... I (A) OUT FIGURE 29. CPU APPLICATION CCM LOAD LINE, VID = 0.9V 8V, V IN1 V = 19V IN3 FIGURE 31. CPU MODE SOFT-START 0A, VID = 1.2V, Ch1: PHASE, Ch2 ISL62881, ISL62881B 19V 0.1 FIGURE 28. CPU APPLICATION DCM EFFICIENCY ...
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... FIGURE 35. CCM STEADY STATE, CPU MODE 1A, VID = 1.2375V, Ch1: PHASE, O Ch2 Phase Margin Gain FIGURE 37. GPU MODE REFERENCE DESIGN LOOP GAIN T2(s) MEASUREMENT RESULT 31 ISL62881, ISL62881B (Continued) = 19V, FIGURE 34. GPU MODE SHUT DOWN 8V, FIGURE 36. DCM STEADY STATE, CPU MODE, IN 1000 900 ...
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... VID = 0.9V 12A/22A, O di/dt = “FASTEST” FIGURE 43. CPU MODE VID TRANSITION, DPRSLPVR = 2A, O VID = 1.2375V/1.0375V, Ch2: V VID4 32 ISL62881, ISL62881B (Continued) FIGURE 40. LOAD TRANSIENT RESPONSE WITH = 12V, IN FIGURE 42. LOAD TRANSIENT RESPONSE WITH = 12V, IN FIGURE 44. GPU MODE VID TRANSITION, , Ch3: O OVERSHOOT REDUCTION FUNCTION ...
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... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 33 ISL62881, ISL62881B (Continued) FIGURE 46. GPU MODE VID TRANSITION www ...
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... Package Outline Drawing L28.4x4 28 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 9/ PIN 1 INDEX AREA TOP VIEW (3 . 20) PACKAGE BOUNDARY ( 50) TYPICAL RECOMMENDED LAND PATTERN 34 ISL62881, ISL62881B MAX (28X 40) (28X 0 . 60) NOTES: 1 ...
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... Package Outline Drawing L32.5x5E 32 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 03/09 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 3.50) ( 4.80 ) (3.70 ) TYPICAL RECOMMENDED LAND PATTERN 35 ISL62881, ISL62881B A B 5.00 3.50 32X 0. SIDE VIEW Max 0.80 ( 28X 0.50) ( 3.50) (32X 0.25 0.60) NOTES: 1. Dimensions are in millimeters. Dimensions Dimensioning and tolerancing conform to AMSE Y14.5m-1994. ...