adc1204802 National Semiconductor Corporation, adc1204802 Datasheet
adc1204802
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adc1204802 Summary of contents
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... Programmable Acquisition Times and user-controllable Throughput Rates Block Diagram TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2002 National Semiconductor Corporation n Programmable data bus width (8/13 bits) n Built-in Sample-and-Hold n Programmable Auto-Calibration and Auto-Zero cycles n Low power standby mode n No missing codes ...
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Connection Diagrams PLCC Package Order Number ADC12048CIV See NS Package Number V44A Ordering Information Industrial Temperature Range −40˚C ≤ T ADC12048CIV ADC12048CIVF Pin Description PLCC Pkg. PQFP Pkg. Pin Number Pin Number ...
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Pin Description (Continued) PLCC Pkg. PQFP Pkg. Pin Number Pin Number MUX OUT− MUX OUT ADCIN− ADCIN WMODE 25 19 SYNC 26–31 20–25 D0–D5 34–40 29–34 D6–D12 ...
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Pin Description (Continued) PLCC Pkg. PQFP Pkg. Pin Number Pin Number and 41 26 and 35 33 and 42 27 and 36 www.national.com Pin Name AGND Analog ground pin. This is the device’s analog supply ground connection. ...
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Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V + and Voltage at all Inputs |V + − ...
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Power Supply Characteristics The following specifications apply to the ADC12048 for V sion mode 12.0 MHz 25Ω, source impedance for V CLK S common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for ...
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Reference Inputs (Continued) The following specifications apply to the ADC12048 for V sion mode 12.0 MHz 25Ω, source impedance for V CLK S common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for ...
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Digital Timing Characteristics The following specifications apply to the ADC12048, 13-bit data bus width data I/O lines Symbol Parameter t Falling Edge Falling Edge of WR CSWR t Active Edge of WR ...
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Notes on Specifications Note and V + must be connected together to the same power supply voltage and bypassed with separate capacitors at each conversion/comparison accuracy. Refer to the Power Supply Considerations section for ...
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Electrical Characteristics FIGURE 1. Output Digital Code vs the Operating Input Voltage Range (General Case) FIGURE 2. Output Digital Code vs the Operating Input Voltage Range for V www.national.com 01238705 01238706 = 4.096V REF 10 ...
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Electrical Characteristics FIGURE 3. V (Continued) Operating Range (General Case) REF FIGURE 4. V Operating Range for V REF 11 01238707 01238708 = 5V A www.national.com ...
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Electrical Characteristics FIGURE 6. Simplified Error vs Output Code without Auto-Calibration or Auto-Zero Cycles www.national.com (Continued) FIGURE 5. Transfer Characteristic 12 01238709 01238710 ...
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Electrical Characteristics FIGURE 7. Simplified Error vs Output Code after Auto-Calibration Cycle FIGURE 8. Offset or Zero Error Voltage (Note 13) (Continued) 13 01238711 01238712 www.national.com ...
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Timing Diagrams FIGURE 9. Sync-Out Write (WMODE = 1), Read and Convert Cycles FIGURE 10. Sync-In Write (WMODE = 1), Read and Convert Cycles www.national.com 14 01238713 01238714 ...
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Timing Diagrams (Continued) FIGURE 11. Sync-Out Write (WMODE = 1), Read and Convert Cycles FIGURE 12. Sync-In Write (WMODE = 1), Read and Convert Cycles 15 01238746 01238747 www.national.com ...
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Timing Diagrams (Continued) FIGURE 13. Sync-Out Read and Convert Cycles. The MUX channel is the channel selected on the most recent write cycle. FIGURE 14. Sync-In Read and Convert Cycles. The MUX channel is the channel selected on the most ...
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Timing Diagrams (Continued) FIGURE 15. 8-Bit Bus Read Cycle (Sync-Out) FIGURE 16. 8-Bit Bus Read Cycle (Sync-In) 17 01238750 01238751 www.national.com ...
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Timing Diagrams (Continued) FIGURE 17. Write Signal Negates RDY (Writing the Standby, Auto-Cal or Auto-Zero Command) FIGURE 18. Standby and Reset Timing (13-Bit Data Bus Width) www.national.com 18 01238715 01238716 ...
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Typical Performance Characteristics Integral Linearity Error (INL) Change vs. Clock Frequency Zero Error Change vs. Clock Frequency Full-Scale Error Change vs. Temperature (See (Note 19), Electrical Characteristic Section) Full-Scale Error Change vs. Clock Frequency 01238717 Integral Linearity Error (INL) Change ...
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Typical Performance Characteristics Integral Linearity Error (INL) Change vs. Reference Voltage Zero Error Change vs. Reference Voltage Full-Scale Error Change vs. Supply Voltage www.national.com (See (Note 19), Electrical Characteristic Section) (Continued) Full-Scale Error Change vs. Reference Voltage 01238723 Integral Linearity ...
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Typical Performance Characteristics Supply Currents vs. Clock Frequency Analog Supply Current vs. Temperature Full Scale Differential 1,099 Hz Sine Wave Input (See (Note 21), Electrical Characteristic Section) Reference Currents vs. Clock Frequency 01238742 Digital Supply Current vs. Temperature 01238744 Full ...
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Typical Performance Characteristics Full Scale Differential 38,452 Hz Sine Wave Input Half Scale Differential 1 kHz Sine Wave Input 153.6 kHz S Half Scale Differential 40 kHz Sine Wave Input 153.6 kHz S www.national.com (See (Note ...
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Register Bit Description CONFIGURATION REGISTER (Write Only) This is a 13-bit write-only register that is used to program the functionality of the ADC12048. All data written to the ADC12048 will always go to this register only. The contents MSB b ...
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Register Bit Description Standby command. This puts the ADC in a low power consumption mode Ful-Cal command. This will cause the ADC to perform a self-calibrating cycle that ...
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Features and Operating Modes (Continued) bits (b – the Configuration register determine which 3 0 channels will appear at the MUXOUT+ and MUXOUT− mul- tiplexer output pins. (Refer to Register Bit Description Sec- tion.) Analog signal conditioning with ...
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Features and Operating Modes (Continued) error is measured eight times, averaged and a correction coefficient is created. The offset correction coefficient is stored in an internal offset correction register. The overall Iinearity correction is achieved by correctng the internal DAC’s ...
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Features and Operating Modes (Continued) WR signal until the rising edge of the SYNC pulse, at which time the signal will be held and conversion begins. The RDY signal will go low when the conversion is done. A new MUX ...
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Analog Application Information * Tantalum ** Ceramic FIGURE 20. Low Drift Extremely Stable Reference Circuit Part Number LM4041CI-Adj LM4040AI-4.1 LM4050 LM4121 LM9140BYZ-4.1 Circuit of Figure 20 OUTPUT DIGITAL CODE VERSUS ANALOG INPUT VOLTAGE The ADC12048’s fully differential 12-bit + sign ...
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Analog Application Information (Continued) 10 µF tantalum electrolytic capacitor in parallel with a 0.1 µF monolithic ceramic capacitor is recommended for bypassing each power supply. The key consideration for these capaci- tors is to have low series resistance and inductance. ...
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Analog Application Information FIGURE 21. Top View of Printed Circuit Board for a 44-Pin PLCC ADC12048 When measuring AC input signals, any crosstalk between analog input/output lines and the reference lines (CH0–CH7, ± ± ± MUXOUT , ADC IN , ...
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Physical Dimensions inches (millimeters) unless otherwise noted 44-Lead (10mm x 10mm) Molded Plastic Quad Flat Package 44-Lead Molded Plastic Leaded Chip Carrier Order Number ADC12048CIV NS Package Number V44A Order Number ADC12048CIVF NS Package Number VGZ44A 31 www.national.com ...
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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...