adc14161 National Semiconductor Corporation, adc14161 Datasheet - Page 13

• Manufacturer Part Number: adc14161
• Description: Low-distortion, Self-calibrating 14-bit, 2.5 Msps, 390 Mw A/d Converter
• Manufacturer: National Semiconductor Corporation

Functional Description
Operating on a single +5V supply, the ADC14161 uses a
pipelined architecture and has error correction circuitry and a
calibration mode to help ensure maximum performance at all
times.
Balanced analog signals with a peak-to-peak voltage equal
to the input reference voltage, V
the common mode input voltage, V
(13 bits plus sign). Neglecting offsets, positive input signal
voltages (V
data and negative input signal voltages (V
produce negative output data. The input signal can be digi-
tized at any clock rate between 300 Ksps and 2.5 Msps.
Input voltages below the negative full scale value will cause
the output word to take on the negative full scale value of
10,0000,0000,0000. Input voltage above the positive full
scale value will cause the output word to take on the positive
full scale value of 01,1111,1111,1111.
The output word rate is the same as the clock frequency. The
analog input voltage is acquired at the falling edge of the
clock and the digital data for that sample is delayed by the
pipeline for 13 clock cycles plus t
put is undefined if the chip is being reset or is in the calibra-
tion mode. The output signal may be inhibited by the RD pin
while the converter is in one of these modes.
The RD pin must be low to enable the digital outputs. A logic
low on the power down (PD) pin reduces the converter
power consumption to less than two milliwatts.
Applications Information
1.0 OPERATING CONDITIONS
We recommend that the following conditions be observed for
operation of the ADC14161:
1.1 The Analog Inputs
The ADC14161 has two analog signal inputs, V
These two pins form a balanced signal input. There are two
reference pins, V
differential input reference.
1.2 Reference Inputs
V
effective reference voltage, V
these two voltages:
The operational voltage range of V
+3.0 Volts. The operational voltage range of V
ground to 1.0V. For best performance, the difference be-
tween V
of 1.8V to 2.2V. Reducing the reference voltage below 1.8V
will decrease the signal-to-noise ratio (SNR) of the
ADC14161. Increasing the reference voltage (and, conse-
quently, the input signal swing) above 2.2V will increase
THD.
REF
+
4.75V
5.25V
3.0V
0.3MHz
V
V
V
IN
CM
REF IN
REF IN
REF
should always be more positive than V
IN
= 2.0V (forced)
+
+ − V
V
IN
V
+ = 2.0V
− = AGND
REF
V
V
D
and V
A
D
f
I/O
CLK
REF
= (V
IN
5.25V
5.25V
−
+
REF
VD
IN
>
2.5 MHz
REF
−
and V
0) produce positive digital output
IN
+
IN
should remain within the range
REF
) − (V
REF
DATA_VALID
, is the difference between
REF
CM
−
REF
, and centered around
REF
, are digitized to 14 bits
IN
+
. These pins form a
−
IN
IN
IN
. The digital out-
is +1.8 Volts to
).
+ − V
IN
REF
+ and V
REF
IN
−
−
−
IN
. The
<
IN
IN
0)
−.
is
13
V
V
this pin with 0.1µF capacitor to ground. Do not load this pin.
It is very important that all grounds associated with the refer-
ence voltage make connection to the analog ground plane at
a single point to minimize the effects of noise currents in the
gound path.
1.3 Signal Inputs
The signal inputs are V
is defined as
Figure 3 indicates the relationship between the input voltage
and the reference voltages. Figure 4 shows the expected in-
put signal range.
The ADC14161 performs best with a balanced input cen-
tered around V
V
each signal input pin should be centered on the V
The two V
out of phase from each other. As a simple check to ensure
this, be certain that the average voltage at the ADC iinput
pins is equal to V
impedance less than 100 Ohms.
REF (MID)
CM
IN
FIGURE 3. Typical Input to Reference Relationaship.
+ or V
. This point is brought out only to be by passed. By pass
FIGURE 4. Expected Input Signal Range.
IN
CM
− should be less than the reference voltage and
is the reference mid-point and is derived from
-centered input signals should be exactly 180˚
CM
. The peak-to-peak voltage swing at either
CM
V
IN
. Drive the analog inputs with a source
= (V
IN
+ and V
IN
+) − (V
IN
−. The signal input, V
IN
DS100154-18
−).
DS100154-17
www.national.com
CM
voltage.
IN
,