adc14161 National Semiconductor Corporation, adc14161 Datasheet - Page 3

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adc14161

Manufacturer Part Number
adc14161
Description
Low-distortion, Self-calibrating 14-bit, 2.5 Msps, 390 Mw A/d Converter
Manufacturer
National Semiconductor Corporation
Datasheet
Analog I/O
Digital I/O
Pin Descriptions and Equivalent Circuits
No.
Pin
48
47
50
49
52
51
10
1
4
V
V
REF
V
V
REF
Symbol
REF (MID)
REF
REF
Clock
V
V
V
IN
IN
CM
+
+
+
OUT
OUT
IN
IN
Equivalent Circuit
Non-Inverting analog signal Input. With a 2.0V reference voltage and a
2.0V common mode voltage, V
1.0 volt to 3.0 Volts.
Inverting analog signal Input. With a 2.0V reference voltage and a 2.0V
common mode voltage, V
to 3.0 Volts. The input signal should be balanced for best performance.
Positive reference input. This pin should be bypassed to AGND with a 0.1
µF monolithic capacitor. V
1.8V and a maximum of 2.2V. The full-scale input voltage is equal to
V
Negative reference input. In most applications this pin should be connected
to AGND and the full reference voltage applied to V
application requires that V
bypassed to AGND with a 0.1 µF monolithic capacitor. V
V
full-scale input voltage is equal to V
Output of the high impedance positive reference buffer. With a 2.0V
reference input, and with a V
voltage. This pin should be bypassed to AGND with a 0.1 µF monolithic
capacitor in parallel with a 10 µF capacitor.
The output of the negative reference buffer. With a 2.0V reference and a
V
bypassed to AGND with a 0.1 µF monolithic capacitor in parallel with a 10
µF capacitor.
Output of the reference mid-point, nominally equal to 0.4 V
pin should be bypassed to AGND with a 0.1 µF monolithic capacitor. This
voltage is derived from V
Input to the common mode buffer, nominally equal to 40% of the supply
voltage (2.0V). This pin should be bypassed to AGND with a 0.1 µF
monolithic capacitor. Best performance is obtained if this pin is driven with
a low impedance source of 2.0V.
Digital clock input. The input voltage is captured t
clock signal. The range of frequencies for this input is 300 kHz to 2.5 MHz.
The clock frequency should not be changed or interrupted during
conversion or while reading data output.
REF
REF− IN
CM
of 2.0V, this pin will have a 1.0V output voltage. This pin should be
+
IN
should be a minimum of 1.8V and a maximum of 2.2V. The
minus V
3
REF
IN
.
CM
CM
REF
REF
.
, the input signal voltage range is from 1.0 Volt
CM
+ minus V
CM
IN
Description
of 2.0V, this pin will have a 3.0V output
be offset from AGND, this pin should be
, the input signal voltage range is from
REF
+
REF− IN
IN
minus V
should be a minimum of
AD
REF
REF
after the fall of the
+
REF
IN
IN
A
. If the
.
+
(2.0V). This
IN
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minus

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