tda8295 NXP Semiconductors, tda8295 Datasheet - Page 49

• Manufacturer Part Number: tda8295
• Description: Tda8295 Digital Global Standard Low If Demodulator For Analog Tv And Fm Radio
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA8295_1
Product data sheet
9.3.20 GPIOs
In the TDA8295, three general purpose input/outputs are implemented.
Table 62.
Legend: * = default value.
Table 63.
Legend: * = default value.
Bit
7 to 4 GP1_CF[3:0]
3 to 0 GP0_CF[3:0]
Bit
7
6
5 and 4 -
Symbol
Symbol
I2CSW_EN
I2CSW_ON
GPIOREG_0 register (address 44h) bit description
GPIOREG_1 register (address 45h) bit description
Digital global standard low IF demodulator for analog TV and FM radio
Access Value
R/W
R/W
Rev. 01 — 4 February 2008
Access Value
R/W
R/W
R/W
0000
0001*
0011
0100
to
1011
XXXX
0000
0001*
0011
0100
to
1011
0*
0*
-
Description
It determines how the general purpose pin GPIO1 is
configured.
It determines how the general purpose pin GPIO0 is
configured.
Description
When I2CSW_EN = 1, GPIO1 and GPIO2 are
configured as an I
the GP1_CF and GP2_CF value. When
I2CSW_ON = 0, the feed-through switch is open, and
GPIO1 and GPIO2 are in 3-state. When the switch is
closed (I2CSW_ON = 1), the I
signals (SCL and SDA) are available on the GPIO1 and
GPIO2 pins.
not used
The GPIO1 pin is in Input mode. The input value is
stored in GP1_VAL.
The GPIO1 pin is in Open-drain mode. The output
value is determined by GP1_VAL.
The GPIO1 pin is in Output mode. The PLL output
clock divided by two is delivered.
The GPIO1 pin is in Output mode. HVPLL signals are
delivered. The output is a one bit signal of
HVPLL_BUS[7:0] according to
Don’t care if I2CSW_EN = 1. Then the pad is
configured as I
Table
The GPIO0 pin is in Input mode. The input value is
stored in GP0_VAL.
The GPIO0 pin is in Open-drain mode. The output
value is determined by GP0_VAL.
The GPIO0 pin is in Output mode. The PLL output
clock divided by two is delivered.
The GPIO0 pin is in Output mode. HVPLL signals are
delivered. The output is a one bit signal of
HVPLL_BUS[7:0] according to
63.
2
C-bus feed-through like described in
2
C-bus feed-through independently of
2
C-bus clock and data
Table
Table
TDA8295
© NXP B.V. 2008. All rights reserved.
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