adv7305a Analog Devices, Inc., adv7305a Datasheet - Page 54

• Manufacturer Part Number: adv7305a
• Description: Multiformat Sd, Progressive Scan/hdtv Video Encoder With Six Nsv 14-bit Dacs
• Manufacturer: Analog Devices, Inc.

ADV7304A/ADV7305A
Appendix C
SD CLOSED CAPTIONING
[Subaddresses 51h–54h]
The ADV7304A/ADV7305A supports closed captioning con-
forming to the standard television synchronizing waveform for
color transmission. Closed captioning is transmitted during the
blanked active line time of Line 21 of the odd fields and Line
284 of the even fields.
Closed captioning consists of a 7-cycle sinusoidal burst that is
frequency and phase-locked to the caption data. After the clock
run-in signal, the blanking level is held for two data bits and is
followed by a Logic Level “1” start bit. Sixteen bits of data
follow the start bit. These consist of two 8-bit bytes, 7 data bits,
and 1 odd parity bit. The data for these bytes is stored in the
SD Closed Captioning Registers [Addresses 53h–54h].
The ADV7304A/ADV7305A also supports the extended closed
captioning operation that is active during even fields and is
encoded on Line 284. The data for this operation is stored in
the SD Closed Captioning Registers [Addresses 51h–52h].
All clock run-in signals and timing to support closed captioning on
Lines 21 and 284 are generated automatically by the ADV7304A/
50 IRE
40 IRE
FREQUENCY = F
REFERENCE COLOR BURST
AMPLITUDE = 40 IRE
Figure 83. Closed Captioning Waveform, NTSC
10.5
10.003 s
(9 CYCLES)
0.25 s
SC
= 3.579545MHz
27.382 s
CLOCK RUN-IN
7 CYCLES OF
0.5035MHz
12.91 s
–54–
ADV7305A. All pixels inputs are ignored during Lines 21 and 284 if
closed captioning is enabled.
FCC Code of Federal Regulations (CFR) 47, Section 15.119
and EIA608 describe the closed captioning information for
Lines 21 and 284.
The ADV7304A/ADV7305A uses a single buffering method.
This means that the closed captioning buffer is only one byte
deep; therefore, there will be no frame delay in outputting the
closed captioning data unlike other 2-byte deep buffering
systems. The data must be loaded one line before (Line 20 or
Line 283) it is output on Line 21 and Line 284. A typical
implementation of this method is to use VSYNC to interrupt a
microprocessor that in turn will load the new data (2 bytes)
every field. If no new data is required for transmission, “0”
must be inserted in both data registers; this is called nulling. It
is also important to load “control codes,” all of which are
double bytes on Line 21, or a TV will not recognize them. If
there is a message like “Hello World” that has an odd number
of characters, it is important to pad it out to even to get the
“end of caption” 2-byte control code to land in the same field.
S
A
R
T
T
D0–D6
BYTE 0
TWO 7-BIT + PARITY
ASCII CHARACTERS
33.764 s
(DATA)
P
A
R
T
Y
I
D0–D6
BYTE 1
P
A
R
Y
T
I
REV. A