cat5269 Catalyst Semiconductor, cat5269 Datasheet - Page 5

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cat5269

Manufacturer Part Number
cat5269
Description
Dual Digitally Programmable Potentiometers Dpp? With 256 Taps And 2-wire Interface
Manufacturer
Catalyst Semiconductor
Datasheet

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POWER UP TIMING
XDCP TIMING
WRITE CYCLE LIMITS
RELIABILITY CHARACTERISTICS
Notes:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t
(3) The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write
Figure 1. Bus Timing
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Symbol
t
Symbol
N
T
V
I
Symbol
Symbol
WR
LTH
DR
ZAP
END
t
t
WRPO
t
cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.
t
PUW
WRL
PUR
PUR
(1)
(1)
(1)
(1)
SDA OUT
and t
SDA IN
SCL
PUW
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
Parameter
Power-up to Read Operation
Power-up to Write Operation
Parameter
Wiper Response Time After Power Supply Stable
Wiper Response Time After Instruction Issued
Parameter
Write Cycle Time
are delays required from the time V
t SU:STA
(1)(2)
(3)
t F
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
t HD:STA
t LOW
t AA
CC
t HD:DAT
is stable until the specified operation can be initiated.
t HIGH
t LOW
5
t DH
t SU:DAT
t R
1,000,000
2000
Min
100
100
Min
5
5
t SU:STO
t BUF
Max
Max
Max
Max
10
10
1
1
5
Doc. No. MD-2123 Rev. C
Cycles/Byte
CAT5269
Years
Units
mA
Units
Units
Units
V
ms
ms
ms
µs
µs

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