cat5269 Catalyst Semiconductor, cat5269 Datasheet - Page 8

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cat5269

Manufacturer Part Number
cat5269
Description
Dual Digitally Programmable Potentiometers Dpp? With 256 Taps And 2-wire Interface
Manufacturer
Catalyst Semiconductor
Datasheet

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CAT5269
INSTRUCTION AND REGISTER
DESCRIPTION
SLAVE ADDRESS BYTE
The first byte sent to the CAT5269 from the
master/processor is called the Slave/DPP Address
Byte. The most significant four bits of the slave
address are a device type identifier. These bits for the
CAT5269 are fixed at 0101[B] (refer to Table 1).
The next four bits, A3 - A0, are the internal slave
address and must match the physical device address
which is defined by the state of the A3 - A0 input pins
for the CAT5269 to successfully continue the
command sequence. Only the device which slave
address matches the incoming device address sent by
the master executes the instruction. The A3 - A0
Figure 6. Write Timing
Table 1. Identification Byte Format
Table 2. Instruction Byte Format
Doc. No. MD-2123 Rev. C
(MSB)
(MSB)
ID3
I3
0
BUS ACTIVITY:
ID2
SDA LINE
MASTER
I2
1
Device Type
Identifier
Instruction
Opcode
S
T
A
R
T
S
ID1
I1
0
Fixed
SLAVE/DPP
ADDRESS
Variable
ID0
I0
1
A
C
K
op code
INSTRUCTION
8
inputs can be actively driven by CMOS input signals
or tied to V
INSTRUCTION BYTE
The next byte sent to the CAT5269 contains the
instruction and register pointer information. The four
most significant bits used provide the instruction
opcode I3 - I0. The R1 and R0 bits point to one of the
four data registers of each associated potentiometer.
The least two significant bits point to one of four Wiper
Control Registers. The format is shown in Table 2.
Data Register Selection
BYTE
Data Register Selected
R1
A3
Register
Address
Data Register
Selection
Pot1 WCR
Address
A
C
K
CC
DR0
DR1
DR1 WCRDATA
A2
R0
Slave Address
or V
SS
.
WCR/Pot Selection
A1
P1
A
C
K
Characteristics subject to change without notice
P
O
S
T
P
R1
0
0
(LSB)
(LSB)
A0
P0
© Catalyst Semiconductor, Inc.
R0
0
1

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