mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 136

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mc68hc908jb8

Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Universal Serial Bus Module (USB)
9.7.2.5 Data Signal Rise and Fall Time
Technical Data
136
For low-speed transmissions, the jitter time for any consecutive
differential data transitions must be within 25ns and within 10ns for
any set of paired differential data transitions. These jitter numbers
include timing variations due to differential buffer delay, rise/fall time
mismatches, internal clock source jitter, noise and other random effects.
The output rise time and fall time are measured between 10% and 90%
of the signal. Edge transition time for the rising and falling edges of
low-speed signals is 75ns (minimum) into a capacitive load (C
200pF and 300ns (maximum) into a capacitive load of 600pF. The rising
and falling edges should be transitioning (monotonic) smoothly when
driving the cable to avoid excessive EMI.
DIFFERENTIAL
DATA LINES
t
Period
JITTER
Universal Serial Bus Module (USB)
Figure 9-14. Data Signal Rise and Fall Time
+
+
C
C
L
L
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
DIFFERENTIAL
DATA LINES
CONSECUTIVE
TRANSITIONS
Figure 9-13. Data Jitter
LOW SPEED: 75ns at C
10%
TRANSITIONS
RISE TIME
PAIRED
t
R
CROSSOVER
90%
POINTS
L
= 200pF, 300ns at C
Freescale Semiconductor
90%
FALL TIME
t
L
F
= 600 pF
10%
L
) of

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