mc33996ek/r2 Freescale Semiconductor, Inc, mc33996ek/r2 Datasheet - Page 14

• Manufacturer Part Number: mc33996ek/r2
• Description: 16-output Switch With Spi Control
• Manufacturer: Freescale Semiconductor, Inc

based on output drain-to-source voltage (V
feature is designed to provide protection to loads that
experience more than expected currents and require fast
shutdown. The 33996 is designed to operate in both modes
with full device protection.
PWM ENABLE REGISTER
PWM controlled. The first 8 bits of the 24 bit SPI message
word are used to identify the PWM enable command, and the
remaining 16 bits are used to enable and disable the PWM of
the output drivers.
outputs as PWM. A logic [1] in the PWM Enable register will
set the specific output as a PWM. Power-ON Reset or the
RST
register to logic [0].
AND/OR CONTROL REGISTER
which the PWM pin controls the output driver. A logic [0] in
the AND /OR Control register will AND the PWM input pin with
the ON /OFF Control register bit. Likewise, a logic [1] in the
AND /OR Control register will OR the PWM input pin with the
ON /OFF Control register bit (see
14
33996
LOGIC COMMANDS AND REGISTERS
INTRODUCTION
The PWM Enable register determines the outputs that are
A logic [0] in the PWM Enable register will disable the
The AND /OR Control register describes the condition by
pin or the RESET command will set the PWM Enable
Figure
12). For the AND /
DS
) > 2.7 V. This
OR control to occur, the PWM Enable bit must be set to
logic [1].
SERIAL OUTPUT (SO) RESPONSE REGISTER
All logic [1s] received by the MCU via the SO pin indicate
fault. All logic [0s] received by the MCU via the SO pin
indicate no fault. All fault bits are cleared on the positive edge
of
to 0. SO bits 21 to 16 will always return logic [0]. Bit 22
provides over-voltage condition status and bit 23 is set when
any fault is present in the IC. The timing between two write
words must be greater than 450 µs to allow adequate time to
sense and report the proper fault status.
RESET COMMAND
following registers to a POR state (refer to
Registers are not affected by the RESET command.
On/Off control Bit
On/Off Control Bit
PWM IN
AND/OR Control Bit
PWM IN
CS
Fault reporting is accomplished through the SPI interface.
The RESET command turns all outputs OFF and sets the
• ON/OFF Control Register
• SFPD Control Register
• PWM Enable Register
• AND/OR Control Register
The Open Load Current Enable and the Global Shutdown
. SO bits 15 to 0 represent the fault status of outputs 15
Figure 12. PWM Control Logic Diagram
On/Off Control Bit
PWM Enable Bit
Analog Integrated Circuit Device Data
Freescale Semiconductor
Table
6).
To Gate
Control