lan9500 Standard Microsystems Corp., lan9500 Datasheet - Page 13

• Manufacturer Part Number: lan9500
• Description: Lan9500/lan9500i Hi-speed Usb 2.0 To 10/100 Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

Hi-Speed USB 2.0 to 10/100 Ethernet Controller
Datasheet
SMSC LAN9500/LAN9500i
NUM PINS
1
1
1
Transmit Data
Transmit Data
Purpose I/O 5
Transmit Data
Transmit Data
Purpose I/O 4
(Internal PHY
(Internal PHY
(Internal PHY
(Internal PHY
(Internal PHY
Configuration
Configuration
PHY Mode)
Mode Only)
PHY Mode)
Mode Only)
PHY Mode)
EEPROM
(External
(External
(External
Transmit
Transmit
General
Wakeup
General
Remote
Disable
NAME
Mode)
Mode)
Mode)
Clock
Clock
Strap
Strap
1
1
0
0
EEP_DISABLE
RMT_WKP
SYMBOL
Table 2.1 MII Interface Pins (continued)
TXCLK
TXCLK
GPIO5
GPIO4
TXD1
TXD1
TXD0
TXD0
DATASHEET
BUFFER
IS/O8/
IS/O8/
TYPE
IS/O8
IS/O8
IS/O8
(PD)
(PD)
OD8
(PU)
(PD)
(PD)
(PD)
OD8
(PU)
(PD)
(PU)
(PU)
O8
O8
IS
IS
IS
13
Transmit Data 1: In internal PHY mode, this pin
can be configured to display the respective
internal MII signal.
Transmit Data 1: In external PHY mode, this pin
functions as the transmit data 1 output to the
external PHY.
General Purpose I/O 5
Remote Wakeup Configuration Strap: This
strap configures the default descriptor values to
support remote wakeup.
0 = Remote wakeup is not supported.
1 = Remote wakeup is supported.
See
configuration straps.
Transmit Data 0: In internal PHY mode, this pin
can be configured to display the respective
internal MII signal.
Transmit Data 0: In external PHY mode, this pin
functions as the transmit data 0 output to the
external PHY.
General Purpose I/O 4
EEPROM Disable Configuration Strap: This
strap disables the autoloading of the EEPROM
contents. The assertion of this strap does not
prevent register access to the EEPROM.
0 = EEPROM is recognized if present.
1 = EEPROM is not recognized even if it is
present.
See
configuration straps.
Transmit Clock: In internal PHY mode, this pin
can be configured to display the respective
internal MII signal.
Transmit Clock: In external PHY mode, this pin
is the transmitter clock input from the external
PHY.
Note 2.1
Note 2.1
for more information on
for more information on
DESCRIPTION
Revision 1.4 (07-07-08)