lan9500 Standard Microsystems Corp., lan9500 Datasheet - Page 15

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lan9500

Manufacturer Part Number
lan9500
Description
Lan9500/lan9500i Hi-speed Usb 2.0 To 10/100 Ethernet Controller
Manufacturer
Standard Microsystems Corp.
Datasheet

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Hi-Speed USB 2.0 to 10/100 Ethernet Controller
Datasheet
SMSC LAN9500/LAN9500i
NUM PINS
NUM PINS
1
1
1
1
1
(Internal PHY
(Internal PHY
Receive Data
(Internal PHY
Receive Data
(Internal PHY
Receive Data
Mode Select
PHY Mode)
PHY Mode)
PHY Mode)
PHY Mode)
PHY Select
PHY Reset
JTAG Test
JTAG Test
JTAG Test
JTAG Test
Data Input
Data Out
(External
(External
(External
(External
NAME
NAME
Mode)
Mode)
Mode)
Mode)
Clock
1
2
3
nPHY_RST
PHY_SEL
SYMBOL
SYMBOL
RXD1
RXD2
RXD3
TDO
TMS
TCK
TDI
Table 2.3 JTAG Pins (continued)
Table 2.4 Miscellaneous Pins
DATASHEET
BUFFER
BUFFER
TYPE
TYPE
(PU)
(PD)
(PU)
(PD)
(PU)
(PD)
(PD)
O8
O8
IS
IS
IS
IS
IS
IS
IS
15
JTAG Data Output: In internal PHY mode, this
pin functions as the JTAG data output.
PHY Reset (Active-Low): In external PHY
mode, this pin functions as the PHY reset output.
JTAG Test Clock: In internal PHY mode, this pin
functions as the JTAG test clock. The maximum
operating frequency of this clock is 25MHz.
Receive Data 1: In external PHY mode, this
signal functions as the receive data 1 input from
the external PHY.
JTAG Test Mode Select: In internal PHY mode,
this pin functions as the JTAG test mode select.
Receive Data 2: In external PHY mode, this
signal functions as the receive data 2 input from
the external PHY.
JTAG Data Input: When in internal PHY mode,
this pin functions as the JTAG data input.
Receive Data 3: In external PHY mode, this pin
functions as the receive data 3 input from the
external PHY.
PHY Select: Selects whether to use the internal
Ethernet PHY or the external PHY connected to
the MII port.
0 = Internal PHY is used.
1 = External PHY is used.
DESCRIPTION
DESCRIPTION
Revision 1.4 (07-07-08)

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