z80230 ZiLOG Semiconductor, z80230 Datasheet - Page 8

• Manufacturer Part Number: z80230
• Description: Esc Enhanced Serial Communication Controller
• Manufacturer: ZiLOG Semiconductor

AC CHARACTERISTICS
Z80230 Read/Write Timing Table (Continued)
No
41
42
43
44
Notes:
[1] Parameter does not apply to Interrupt Acknowledge transactions.
[2] Parameter applies only between transactions involving the SCC.
[3] Float delay is defined as the time required for a 0.5V change in the output with a maximum DC load and a minimum AC load.
[4] Open-drain output, measured with open-drain test load.
[5] Parameter is system dependent. For any Z-SCC in the daisy chain. TdAS(DSA) must be greater than the sum of TdAS(IEO) for the highest priority
[6] Parameter applies only to a Z-SCC pulling INT Low at the beginning of the Interrupt Acknowledge transaction.
[7] Internal circuitry allows for the reset provided by the Z8 to be recognized as a reset by the Z-SCC. All timing references assume 2.0V for a logic
* Units in nanoseconds (ns).
8
device in the daisy chain. TslEl(DSA) for the Z-SCC, and TdlElf(IEO) for each device separating them in the daisy chain.
"1" and 0.8V for a logic "0".
Symbol
TwPCh
TcPC
TrPC
TfPC
Parameter
PCLK High Width
PCLK Cycle Time
PCLK Rise Time
PCLK Fall Time
100
Min
40
10 MHz
1000
2000
Max
10
10
Min
61
26
16 MHz
1000
2000
Max
5
5
Notes*