sta323wqs STMicroelectronics, sta323wqs Datasheet - Page 31

• Manufacturer Part Number: sta323wqs
• Description: 2.1-channel High-efficiency Digital Audio System With Qsound Qhd??
• Manufacturer: STMicroelectronics

STA323WQS
6.3
6.3.1
6.3.2
6.4
6.4.1
6.4.2
Write operation
Following the START condition the master sends a device select code with the RW bit set to
0. The STA323WQS acknowledges this and then the master writes the internal address
byte.
After receiving the internal byte address the STA323WQS again responds with an
acknowledgement.
Byte write
In the byte write mode the master sends one data byte. This is acknowledged by the
STA323WQS. The master then terminates the transfer by generating a STOP condition.
Multi-byte write
The multi-byte write modes can start from any internal address. Sequential data bytes are
written to sequential addresses within the STA323WQS.
The master generates a STOP condition to terminate the transfer.
Read operation
Current address byte read
Following the START condition the master sends a device select code with the RW bit set
to 1. The STA323WQS acknowledges this and then responds by sending one byte of data.
The master then terminates the transfer by generating a STOP condition.
Current address multi-byte read
The multi-byte read modes can start from any internal address. Sequential data bytes are
read from sequential addresses within the STA323WQS. The master acknowledges each
data byte read and then generates a STOP condition to terminate the transfer.
Random address byte read
Following the START condition the master sends a device select code with the RW bit set to
0. The STA323WQS acknowledges this and then the master writes the internal address
byte. After receiving, the internal byte address the STA323WQS again responds with an
acknowledgement. The master then initiates another START condition and sends the device
select code with the RW bit set to 1. The STA323WQS acknowledges this and then
responds by sending one byte of data. The master then terminates the transfer by
generating a STOP condition.
Random address multi-byte read
The multi-byte read modes can start from any internal address. Sequential data bytes are
then read from sequential addresses within the STA323WQS. The master acknowledges
each data byte read and then generates a STOP condition to terminate the transfer.
STA323WQS I2C bus specification
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