hmp8156a Intersil Corporation, hmp8156a Datasheet - Page 19

• Manufacturer Part Number: hmp8156a
• Description: Ntsc/pal Video Encoder
• Manufacturer: Intersil Corporation

NUMBER
NUMBER
BIT
BIT
1-0
7
6
5
4
3
2
7
6
5
4
3
2
1
0
Luminance
Processing
Composite Video
Limiting
SCH Phase
Mode
RGB Pedestal En-
able
RGB pin Assignment
select
First Active
Line Select
Flicker Filter
Processing
BLANK
Timing Select
Reserved
BLANK Output Con-
trol
BLANK
Polarity
HSYNC and
VSYNC Output
Control
HSYNC
Polarity
VSYNC
Polarity
FIELD
Polarity
FUNCTION
FUNCTION
19
0 = None
1 = Y Lowpass filtering enabled
0 = None
1 = Lower limit of composite active video is about half the sync height
0 = Never reset SCH phase
1 = Reset SCH phase every 4 (NTSC) or 8 (PAL) fields
0 = Don’t add blanking pedestal to RGB output
1 = add blanking pedestal to RGB output
0 = use HMP8156 assignments
1 = SCART connector compatible
This bit is ignored unless flicker filtering is enabled. This bit is ignored on the HMP8156.
0 = First line of active video in odd fields is on an odd line number
1 = First line of active video in odd fields is on an even line number
These bits must be “00” during 8-bit YCbCr and BT.656 input modes, and SIF input resolution
mode. These bits are always “00” on the HMP8156A.
00 = No flicker filtering
01 = reserved
10 = reserved
11 = 3-line flicker filtering enabled
This bit is ignored unless BLANK is configured to be an output.
0 = Data for the first active pixel of the scan line must arrive the CLK cycle after the encoder
negates BLANK.
1 = Data for the first active pixel of the scan line must arrive immediately after the encoder ne-
gates BLANK.
0 = BLANK is an input
1 = BLANK is an output
0 = Active low (low during blanking)
1 = Active high (high during blanking)
0 = HSYNC and VSYNC are inputs
1 = HSYNC and VSYNC are outputs
0 = Active low (low during horizontal sync)
1 = Active high (high during horizontal sync)
0 = Active low (low during vertical sync)
1 = Active high (high during vertical sync)
0 = Active low (low during odd fields)
1 = Active high (high during odd fields)
TABLE 14. VIDEO PROCESSING REGISTER
TABLE 15. TIMING I/O REGISTER #1
HMP8154, HMP8156A
SUB ADDRESS = 03
SUB ADDRESS = 04
DESCRIPTION
DESCRIPTION
H
H
November 4, 2005
RESET
RESET
STATE
STATE
00
1
0
1
0
0
0
0
0
0
0
0
0
0
0
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
4343.4