hmp8156a Intersil Corporation, hmp8156a Datasheet - Page 27

• Manufacturer Part Number: hmp8156a
• Description: Ntsc/pal Video Encoder
• Manufacturer: Intersil Corporation

Electrical Specifications
NOTES:
Output Compliance Range
Video Level Error
DAC to DAC Matching
VREF Output Voltage
VREF Output Current
VREF Input Voltage
VREF Input Current
AC PARAMETERS, ANALOG OUTPUTS
Differential Gain Error
Differential Phase Error
SNR (Weighted)
Hue Accuracy
Color Saturation Accuracy
Luminance Nonlinearity
Residual Subcarrier
SCH Phase
Analog Output Skew, T
Analog Output Delay, T
DAC-DAC Crosstalk
Glitch Energy
AC PARAMETERS, DIGITAL INPUTS AND OUTPUTS EXCEPT SCL AND SDA
Setup Time, T
Hold Time, T
CLK2 Frequency
CLK2 High Time, CLK2
CLK2 Low Time, CLK2
CLK2 to Output Delay, T
RESET* Pulse Width Low, T
AC PARAMETERS, SCL AND SDA (I
All AC parameters meet the fast-mode I
POWER SUPPLY CHARACTERISTICS
DAC PSRR at DC
Power Supply Range, V
Normal Supply Current, I
Power-Down Supply Current, I
Power Dissipation
4. Output level is dependent on the voltage on VREF, the value of RSET, and the load.
5. If using an external voltage reference, it is not powered down. The internal voltage reference is always powered down.
6. The supply voltage rejection is the relative variation of the full-scale output driving a 37.5Ω load for a ±0.5% supply variation:
Internal Voltage Reference
External Voltage Reference
PSRR = 20 x log (∆V
H
S
PARAMETER
L
ASK
AD
H
AA
AA
D
AA
/∆V
RES
AA
OUT
27
V
).
AA
2
= +5V ±5%, RSET = 133Ω, VREF Unconnected, T
C INTERFACE)
2
C Bus Interface specification.
(Note 4)
VREF unconnected, RSET = 133Ω
VREF = 1.230V (Figure 37), RSET = 140Ω
Pin not driven, using internal reference
Figure 37.
Using analog output filter shown in Figure 38A.
SCH Phase Reset enabled
Using analog output filter shown in Figure 38A.
Includes clock and data feedthrough
Note 6
Note 5
Pin connected to external reference shown in
HMP8154, HMP8156A
TEST CONDITION
A
= 25
o
C, Unless Otherwise Specified (Continued)
1.112
-500
MIN
1.13
13.6
13.6
4.75
-50
0
8
0
2
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.195
1.230
1100
TYP
±1.5
-60
-60
5.0
70
35
64
1
1
2
2
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.358
MAX
1300
1.32
30.0
20.3
20.3
5.25
±10
±10
500
260
750
1.4
50
12
12
5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
November 4, 2005
Degree
Degree
Degree
UNITS
Cycles
pV-s
MHz
CLK
mW
mA
µA
µA
dB
dB
dB
dB
µA
ns
ns
ns
ns
ns
ns
ns
%
%
%
%
%
%
V
V
V
V
4343.4