at42qt1070 ATMEL Corporation, at42qt1070 Datasheet - Page 16

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at42qt1070

Manufacturer Part Number
at42qt1070
Description
Qtouch 7-channel Sensor Ic
Manufacturer
ATMEL Corporation
Datasheet

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4.3.2
16
AT42QT1070
Reading Data From the Device
Note: the host should not try to write to addresses outside the range 0x20 to 0x39 because this
is the limit of the device’s internal memory address.
The sequence of events required to read data from the device is shown next.
Note:
3. The device sends an ACK.
4. The host then sends the memory address within the device it wishes to write to.
5. The device sends an ACK if the write address is in the range 0x00 – 0x7F, otherwise it
6. The host transmits one or more data bytes; each is acknowledged by the device (unless
7. If the host sends more than one data byte, they are written to consecutive memory
8. The device automatically increments the target memory address after writing each data
9. After writing the last data byte, the host should send the STOP condition.
1. The host initiates the transfer by sending the START condition
2. The host follows this by sending the slave address of the device together with the
3. The device sends an ACK.
4. The host then sends the memory address within the device it wishes to read from.
5. The device sends an ACK if the address to be read from is less than 0x80 otherwise it
6. The host must then send a STOP and a START condition followed by the slave address
7. The device returns an ACK, followed by a data byte.
8. The host must return either an ACK or NACK.
9. The device resets the internal address to the location indicated by the memory address
sends a NACK.
trying to write to an invalid address).
addresses.
byte.
WRITE bit.
sends a NACK).
again but this time accompanied by the READ bit.
Note:
a. If the host returns an ACK, the device subsequently transmits the data byte from
b. If the host returns a NACK, it should then terminate the transfer by issuing the
sent to it previously. Therefore, there is no need to send the memory address again
when reading from the same location.
Reading the 16-bit reference and signal values is not an automatic operation; reading
the first byte of a 16-bit value does not lock the other byte. As a result glitches in the
reported value may be seen as values increase from 255 to 256, or decrease from 256
to 255.
the next address. Each time a data byte is transmitted, the device automatically
increments the internal address. The device continues to return data bytes until the
host responds with a NACK.
STOP condition.
Alternatively, instead of step 6 a repeated START can be sent so the host does not
need to relinquish control of the bus.
S
SLA+W
Data 1
A
A
Host to Device
MemAddress
Data 2
A
A
P
S
Device to Host
SLA+R
Data n
A
/A
P
9596A–AT42–10/10

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