aduc844bs62-5 Analog Devices, Inc., aduc844bs62-5 Datasheet

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aduc844bs62-5

Manufacturer Part Number
aduc844bs62-5
Description
Microconverter 1-cycle 8052 24-bit 16-bit 12-bit K-byte Flash
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC844BS62-5.pdf (20 pages)
a
Preliminary Technical Data
FEATURES
High Resolution Sigma-Delta ADCs
Memory
8051-Based Core
On-Chip Peripherals
Power
Package and Temperature Range
APPLICATIONS
Intelligent Sensors
WeighScales
Portable Instrumentation, Battery Powered Systems
4-20mA Transmitters
Data Logging
Precision System Monitoring
REV. PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
No license is granted by implication or otherwise under any patent or patent rights
of Analog Devices. Trademarks and registered trademarks are the property of their
respective companies.
Two Independent ADCs (24-Bit and 16-Bit Resolution)
24-Bit No Missing Codes, Primary ADC
21-Bit rms (18.5 Bit p-p) Effective Resolution @ 20 Hz
Offset Drift 10 nV/°C, Gain Drift 0.5 ppm/°C
62 Kbytes On-Chip Flash/EE Program Memory
4 Kbytes On-Chip Flash/EE Data Memory
Flash/EE, 100 Year Retention, 100 Kcycles Endurance
3 Levels of Flash/EE Program Memory Security
In-Circuit Serial Download (No External Hardware)
High Speed User Download (5 Seconds)
2304 Bytes On-Chip Data RAM
8051 Compatible Instruction Set
High Performance Single Cycle Core
32 kHz External Crystal
On-Chip Programmable PLL (12.58 MHz Max)
3
26 Programmable I/O Lines
11 Interrupt Sources, Two Priority Levels
Dual Data Pointer, Extended 11-Bit Stack Pointer
Internal Power on Reset Circuit
12-Bit Voltage Output DAC
Dual 16-Bit S-D DACs/PWMs
On-Chip Temperature Sensor
Dual Excitation Current Sources
Time Interval Counter (Wakeup/RTC Timer)
UART, SPI ® , and I 2 C ® Serial I/O
High Speed Baud Rate Generator (incl 115,200)
Watchdog Timer (WDT)
Power Supply Monitor (PSM)
Normal: 2.3mA Max @ 3.6 V (Core CLK = 1.57 MHz)
Power-Down: 20 A Max with Wakeup Timer Running
Specified for 3 V and 5 V Operation
52-Lead MQFP (14 mm
56-Lead CSP (8 mm
16-Bit Timer/Counter
8 mm), –40°C to +85°C
14 mm), –40°C to +125°C
PRELIMINARY TECHNICAL DATA
MicroConverter, Dual 16-Bit/24-Bit ADCs
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
with Embedded 62kB FLASH MCU
GENERAL DESCRIPTION
The ADuC844 is a complete smart transducer front end, integrating
two high resolution sigma-delta ADCs, an 8-bit MCU, and
program/data Flash/EE memory on a single chip.
The two independent ADCs (primary and auxiliary) include a
temperature sensor and a PGA (allowing direct measurement of low
level signals). The ADCs with on-chip digital filtering and
programmable output data rates are intended for the measurement of
wide dynamic range, low frequency signals, such as those in weigh
scale, strain-gage, pressure transducer, or temperature measurement
applications.
The device operates from a 32 kHz crystal with an on-chip PLL
generating a high frequency clock of 12.58 MHz. This clock is routed
through a programmable clock divider from which the MCU core
clock operating frequency is generated. The microcontroller core is an
optimized single cycle 8052 offering up to 12.58MIPs performance
while maintaining the 8051 instruction set compatibility.
62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes of
nonvolatile Flash/EE data memory, and 2304 bytes of data RAM are
provided on-chip. The program memory can be configured as data
memory to give up to 60 Kbytes of NV data memory in data logging
applications.
On-chip factory firmware supports in-circuit serial download and
debug modes (via UART), as well as single-pin emulation mode via
the EA pin. The ADuC844 is supported by a QuickStart™
development system featuring low cost software and hardware
development tools.
FUNCTIONAL BLOCK DIAGRAM
© 2003 Analog Devices, Inc. All rights reserved.
ADuC844
www.analog.com

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aduc844bs62-5 Summary of contents

Page 1

... UART), as well as single-pin emulation mode via the EA pin. The ADuC844 is supported by a QuickStart™ development system featuring low cost software and hardware development tools. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. ADuC844 www.analog.com ...

Page 2

PRELIMINARY TECHNICAL DATA ADuC844 SPECIFICATIONS PARAMETER PRIMARY ADC Conversion Rate 2 No Missing Codes Resolution Output Noise Integral Non Linearity 3 Offset Error Offset Error Drift (vs. Temp) 4 Full-Scale Error 5 Gain Error Drift (vs. Temp) ADC Range Matching ...

Page 3

PRELIMINARY TECHNICAL DATA PARAMETER AUXILIARY ADC 2 No Missing Codes Resolution Output Noise Integral Non Linearity 3 Offset Error Offset Error Drift 4 Fullscale Error 5 Gain Error Drift Power Supply Rejection Normal Mode 50/60 Hz Rejection On AIN On ...

Page 4

PRELIMINARY TECHNICAL DATA ADuC844 SPECIFICATIONS PARAMETER INT REFERENCE ADC Reference Reference Voltage Power Supply Rejection Reference Tempco DAC Reference Reference Voltage Power Supply Rejection Reference Tempco TEMPERATURE SENSOR Accuracy Thermal Impedance TRANSDUCER BURNOUT CURRENT SOURCES AIN+ Current AIN- Current Initial ...

Page 5

PRELIMINARY TECHNICAL DATA PARAMETER LOGIC INPUTS All Inputs except SCLOCK, RESET 2 and XTAL1 V , Input Low Voltage INL V , Input Low Voltage INH SCLOCK and RESET Only 2 (Schmidt Triggered Inputs ...

Page 6

PRELIMINARY TECHNICAL DATA ADuC844 SPECIFICATIONS PARAMETER FLAH/EE MEMORY RELIABILITY CHARACTERISTICS 16 Endurance 17 Data Retention POWER REQUIREMENTS Power Supply Voltages AV 3V Nominal Nominal Nominal Nominal DD 5V POWER CONSUMPTION 18, ...

Page 7

PRELIMINARY TECHNICAL DATA NOTES 1 Temperature Range for ADuC844BS (MQFP package) is –40°C to +125°C. Temperature Range for ADuC844BCP (CSP package) is –40°C to +85°C. 2 These numbers are not production tested but are guaranteed by design and/or characterization data ...

Page 8

... AGND and DGND are shorted internally on the ADuC844. 3 Applies to P1.2 to P1.7 pins operating in analog or digital input modes. Temperature MODEL o Range ( C) ADuC844BS62-5 -40 à+125 ADuC844BS62-3 -40 à+125 ADuC844BCP62-5 -40 à+125 ADuC844BCP62-3 -40 à+125 ADuC844BCP32-5 -40 à ...

Page 9

PRELIMINARY TECHNICAL DATA Pin No: Pin No: Pin 52-MQFP 56-CSP Mnemonic 1, 2 56, 1 P1.0/P1.1 P1.0/T2/PWM0 P1.1/T2EX/PWM1 3 à à3 P1.2 àP1.7 9 à à14 P1.2/DAC/IEXC1 P1.3/AIN5/IEXC2 P1.4/AIN1 P1.5/AIN2 P1.6/AIN3 P1.7/AIN4/DAC 5 4 AVDD 6 ...

Page 10

PRELIMINARY TECHNICAL DATA ADuC844 Pin No: Pin No: Pin 52-MQFP 56-CSP Mnemonic P3.0 à P3.7 16-19 18-21 22-25 24- P3.0/RXD 17 19 P3.1/TXD 18 20 P3.2/INT0 19 21 P3.3/INT1 22 24 P3.4/T0/PWMCLK 23 25 P3.5/ P3.6/WR ...

Page 11

PRELIMINARY TECHNICAL DATA Pin No: Pin No: Pin 52-MQFP 56-CSP Mnemonic 41 44 PSEN 42 45 ALE 43 à à 49 P0.0 à P0.7 49 à à Input Output ...

Page 12

PRELIMINARY TECHNICAL DATA ADuC844 DETAILED BLOCK DIAGRAM WITH PIN NUMBERS Figure 1: Detailed Block Diagram of the ADuC844 -12- REV. PrB ...

Page 13

PRELIMINARY TECHNICAL DATA MEMORY7 ORGANISATION The ADuC844 contains 4 different memory blocks namely: - 62kBytes of On-Chip Flash/EE Program Memory - 4kBytes of On-Chip Flash/EE Data Memory - 256 Bytes of General Purpose RAM - 2kBytes of Internal XRAM (1) ...

Page 14

PRELIMINARY TECHNICAL DATA ADuC844 The 11-bit stack pointer is visable in the SP and SPH SFRs. The SP SFR is located at 81h as with a standard 8052. The SPH SFR is located at B7h. The 3 LSBs of this ...

Page 15

PRELIMINARY TECHNICAL DATA EXSP (CFG844.7) bit must be set otherwise the SPH SFR cannot be read or written to. Program Status Word (PSW) The PSW SFR contains several bits reflecting the current status of the CPU as detailed in Table ...

Page 16

PRELIMINARY TECHNICAL DATA ADuC844 COMPLETE SFR MAP Figure 5 below shows a full SFR memory map and the SFR contents after RESET. NOT USED indicates unoccupied SFR locations. Unoccupied locations in the SFR address space are not implemented; i.e., no ...

Page 17

PRELIMINARY TECHNICAL DATA INTRODUCTION The ADuC844 is a pin compatible upgrade to the ADuC834 provide increased core performance. The ADUC844 has a single cycle 8052 core allow operation 12.58MIPs. It has all the same features as the ...

Page 18

PRELIMINARY TECHNICAL DATA ADuC844 Mnemonic Arithmetic LOGIC ANL A,Rn ANL A,@Ri ANL A,dir ANL A,#data ANL dir,A ANL dir,#data ORL A,Rn ORL A,@Ri ORL A,dir ORL A,#data ORL dir,A ORL dir,#data XRL A,Rn XRL A,@Ri XRL A,#data XRL dir,A XRL ...

Page 19

PRELIMINARY TECHNICAL DATA Mnemonic Arithmetic BRANCHING JMP @A+DPTR RET RETI ACALL addr11 AJMP addr11 SJMP rel JC rel JNC rel JZ rel JNZ rel DJNZ Rn,rel LJMP LCALL addr16 JB bit,rel JNB bit,rel JBC bit,rel CJNE A,dir,rel CJNE A,#data,rel CJNE ...

Page 20

PRELIMINARY TECHNICAL DATA ADuC844 -20- REV. PrB ...

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