aduc844bs62-5 Analog Devices, Inc., aduc844bs62-5 Datasheet - Page 10

• Manufacturer Part Number: aduc844bs62-5
• Description: Microconverter 1-cycle 8052 24-bit 16-bit 12-bit K-byte Flash
• Manufacturer: Analog Devices, Inc.

ADuC844
52-MQFP
20, 34, 48
21, 35, 47
28 à 31
36 à 39
Pin No:
16-19
22-25
16
17
18
19
22
23
24
25
26
27
32
33
40
22, 36, 51
23, 37, 50
30 à 32
38 à 42
Pin No:
56-CSP
18-21
24-27
18
19
20
21
24
25
26
27
28
29
34
35
43
P3.4/T0/PWMCLK
MOSI/SDATA
PRELIMINARY TECHNICAL DATA
P3.0 à P3.7
P2.0 à P2.7
Mnemonic
P3.2/INT0
P3.3/INT1
P3.0/RXD
P3.1/TXD
SCLOCK
P3.6/WR
P3.7/RD
P3.5/T1
XTAL1
XTAL2
DVDD
DGND
Pin
EA
Type*
I/O
I/O
I/O
I/O
O
S
S
I
Description
P3.0–P3.7 are bi-directional port pins with internal pull-up resistors. Port 3
pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 3 pins being
pulled externally low will source current because of the internal pull-up
resistors. When driving a 0-to-1 output transition, a strong pull-up is active for
two core clock periods of the instruction cycle.
Port 3 pins also have various secondary functions described below.
Receiver Data for UART serial Port
Transmitter Data for UART serial Port
External Interrupt 0. This pin can also be used as a gate control input to
Timer0.
External Interrupt 1. This pin can also be used as a gate control input to
Timer1.
Timer/Counter 0 External Input
If the PWM is enabled, an external clock may be input at this pin.
Timer/Counter 1 External Input
External Data Memory Write Strobe. Latches the data byte from Port 0 into an
external data memory.
External Data Memory Read Strobe. Enables the data from an external data
memory to Port 0.
Digital Supply Voltage
Digital Ground.
Serial interface clock for either the I
is a Schmitt-triggered input and a weak internal pull-up is present on this pin
unless it is outputting logic low. This pin can also be directly controlled in
software as a digital output pin.
Serial Data I/O for the I
Interface. A weak internal pull-up is present on this pin unless it is outputting
logic low. This pin can also be directly controlled in software as a digital
output pin.
Port 2 is a bidirectional port with internal pull-up resistors. Port 2 pins that
have 1s written to them are pulled high by the internal pull-up resistors, and in
that state can be used as inputs. As inputs, Port 2 pins being pulled externally
low will source current because of the internal pull-up resistors.
Port 2 emits the high order address bytes during fetches from external program
memory and middle and high order address bytes during accesses to the 24-bit
external data memory space.
Input to the crystal oscillator inverter.
Output from the crystal oscillator inverter. (see “Hardware Design
Considerations” for description)
External Access Enable, Logic Input. When held high, this input enables the
device to fetch code from internal program memory locations 0000h to
F7FFh. When held low this input enables the device to fetch all instructions
from external program memory. To determine the mode of code execution,
i.e., internal or external, the EA pin is sampled at the end of an external
RESET assertion or as part of a device power cycle.
EA may also be used as an external emulation I/O pin and therefore the
voltage level at this pin must not be changed during normal mode operation as
it may cause an emulation interrupt that will halt code execution.
-10-
2
C Interface or Master Output/Slave Input for the SPI
2
C or SPI interface. As an input, this pin
REV. PrB