stdve103a STMicroelectronics, stdve103a Datasheet - Page 15

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stdve103a

Manufacturer Part Number
stdve103a
Description
Adaptive 3.4 Gbps 3 1 Tmds/hdmi Signal Equalizer
Manufacturer
STMicroelectronics
Datasheet

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STDVE103A
4.2
4.2.1
4.3
4.4
Operating modes
SEL operating modes
The active source is selected by configuring source select inputs, S1 and S2. The selected
TMDS inputs from each port are switched through a 3-to-1 multiplexer. The I
the selected input port is linked to the I
detector (HPD) of the selected input port is output to HPD_SINK.
Table 4.
H: logic high; L: logic low; X: don't care; Z: high impedance
HPD pins
The input pin HPD_SINK is 5 V tolerant, allowing direct connection to 5 V signals. The
switch is able to pass both 0 V and 5 V signal levels. The HPD_SINK is an input pin while
the HPD1, HPD2 and HPD3 are outputs.
DDC channels
The DDC channels are designed with a bidirectional NMOS gate, providing 5 V signal
tolerance. The 5 V tolerance allows direct connection to a standard I
the need for a level shifter. There should be external pull-up resistors on either side of the
device on both the SCL and SDA lines.
S2
H
H
L
L
S1
H
H
L
L
Control pins
SEL operating modes
of A2/B2 and A3/B3
of A1/B1 and A3/B3
of A1/B1 and A2/B2
All terminations are
A1/B1 terminations
A2/B2 terminations
A3/B3 terminations
are disconnected
are disconnected
are disconnected
disconnected
None (Z).
Y/Z
2
Pulled high by
C interface of the output port, and the hot plug
I/O selected
SCL_SINK
SDA_SINK
termination
None (Z).
external
SDA1
SDA2
SDA3
SCL1
SCL2
SCL3
HPD_SINK
HPD1
Z
Z
Z
Hot-plug detect status
Functional description
2
HPD_SINK
C bus, thus eliminating
HPD2
Z
Z
Z
2
C interface of
HPD_SINK
HPD3
Z
Z
Z
15/44

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