stdve103a STMicroelectronics, stdve103a Datasheet - Page 39

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stdve103a

Manufacturer Part Number
stdve103a
Description
Adaptive 3.4 Gbps 3 1 Tmds/hdmi Signal Equalizer
Manufacturer
STMicroelectronics
Datasheet

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STDVE103A
6.3.1
I
A typical application is shown in the figure below. In the example, the system master is
running on a 3.3 V I
100 kHz unless the slave bus is isolated and then the master bus can run at 400 kHz.
Master devices can be placed on either bus.
Figure 20. Typical application of I
The STDVE103A DDC lines are 5 V tolerant; so it does not require any extra circuitry to
translate between the different bus voltages.
2
C lines application information
Bus Master
400 kHz
SDA
SCL
2
C-bus while the slave is connected to a 5 V bus. Both buses run at
3.3V
BUS 0
SHDN_N
2
C bus system
SDA
SCL
SEL
STDVE103A
SDA
SCL
BUS 1
Application information
5.0V
SDA
SCL
100 kHz
Slave
AM00712V1
39/44

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